Bulletin of the Polish Academy of Sciences-Technical Sciences - Magazine - MOST Wiedzy

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Bulletin of the polish academy of sciences-technical sciences

SHERPA RoMEO status:

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Pre-print
author's version of the article before the review
Post-print
author's version of the article after the review

Status table SHERPA RoMEO

Status table SHERPA RoMEO
RoMEO color Archiving policy
Green can archive pre-prints and post-prints or a version of the publisher
Blue can archive post-prints
Yellow can archive pre-prints
White can not archive any materials
Gray unknown

ISSN: 0239-7528

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MNiSW Points

MNiSW Points
List Year Points
A 2017 25
A 2016 20
A 2015 20
A 2014 25
A 2013 25
A 2011 30
B 2008 9
A 2008 13

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total: 60

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  • Power equalization of AES FPGA implementation

    This paper briefly introduces side channel attacks on cryptographic hardware with special emphasis on differential power analysis(DPA). Based on existing countermeasures against DPA, design method combining power equalization for synchronous and combinatorialcircuits has been proposed. AES algorithm has been implemented in Xilinx Spartan II-E field programmable gate array (FPGA) deviceusing the standard and power-equalized methods....

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2008
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