This paper presents the adaptation of a 3D integration concept previously used with vertical devices to lateral GaN devices. This 3D integration allows to reduce loop inductance, to ensure more symmetrical design with especially limited Common Mode emission, thanks to a low middle point stray capacitance. This reduction has been achieved by both working on the power layout and including a specific shield between the devices and...
The improvement of the gate driver for GaN transistor is presented in this paper. The proposed topology contains the overcurrent protectionwith the two-stage turning off and independent control of turn on and off time of the GaN transistor. The operation of driver and its application in thehalf-bridge converter are described using both simulation and prototype measurements. The overcurrent protection was tested in Double Pulse...
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