Implementation of Coprocessor for Integer Multiple Precision Arithmetic on Zynq Ultrascale+ MPSoC - Publication - Bridge of Knowledge

Search

Implementation of Coprocessor for Integer Multiple Precision Arithmetic on Zynq Ultrascale+ MPSoC

Abstract

Recently, we have opened the source code of coprocessor for multiple-precision arithmetic (MPA). In this contribution, the implementation and benchmarking results for this MPA coprocessor are presented on modern Zynq Ultrascale+ multiprocessor system on chip, which combines field-programmable gate array with quad-core ARM Cortex-A53 64-bit central processing unit (CPU). In our benchmark, a single coprocessor can be up to 4.5 times faster than a single CPU core within the same chip emulating MPA using a software library.

Citations

  • 1

    CrossRef

  • 0

    Web of Science

  • 1

    Scopus

Cite as

Full text

full text is not available in portal

Keywords

Details

Category:
Conference activity
Type:
publikacja w wydawnictwie zbiorowym recenzowanym (także w materiałach konferencyjnych)
Language:
English
Publication year:
2021
Bibliographic description:
Stefański T., Rudnicki K., Żebrowski W.: Implementation of Coprocessor for Integer Multiple Precision Arithmetic on Zynq Ultrascale+ MPSoC// / : , 2021,
DOI:
Digital Object Identifier (open in new tab) 10.23919/mixdes52406.2021.9497554
Sources of funding:
  • Free publication
Verified by:
Gdańsk University of Technology

seen 96 times

Recommended for you

Meta Tags