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Department Of Microelectronic Systems
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total: 773
Catalog Publications
Year 2015
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Rapid Yield Estimation and Optimization of Microwave Structures Exploiting Feature-Based Statistical Analysis
PublicationIn this paper, we propose a simple, yet reliable methodology to expediteyield estimation and optimization of microwave structures. In our approach,the analysis of the entire response of the structure at hand (e.g., $S$-parameters asa function of frequency) is replaced by response surface modeling of suitablyselected feature points. On the one hand, this is sufficient to determinewhether a design satisfies given performance specifications....
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Reliable Microwave Modeling By Means of Variable-Fidelity Response Features
PublicationIn this work, methodologies for low-cost and reliable microwave modeling are presented using variable-fidelity response features. The two key components of our approach are: (i) a realization of the modeling process at the level of suitably selected feature points of the responses (e.g., S-parameters vs. frequency) of the structure at hand, and (ii) the exploitation of variable-fidelity EM simulation data, also for the response...
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Rotational Design Space Reduction for Cost-Efficient Multi-Objective Antenna Optimization
PublicationCost-efficient multi-objective design of antenna structures is presented. Our approach is based on design space reduction algorithm using auxiliary single-objective optimization runs and coordinate system rotation. The initial set of Pareto-optimal solutions is obtained by optimizing a response surface approximation model established in the reduced space using coarse-discretization EM simulation data. The optimization engine is...
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Simulation-Based Design of Microstrip Linear Antenna Arrays Using Fast Radiation Response Surrogates
PublicationFast yet accurate technique for simulation-based design of linear arrays of microstrip patch antennas is presented. Our technique includes: (i) optimization of the corrected array factor of the antenna array under design for a phase excitation taper resulting in reduced side lobes; (ii) simulation-driven optimization of the array element for element dimensions resulting in matching at and about operational frequency, and (iii)...
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Size Reduction of Microwave Couplers by EM-Driven Optimization
PublicationThis work addresses simulation-driven design optimization of compact microwave couplers that explicitly aims at circuit footprint area reduction. The penalty function approach allows us to minimize the area of the circuit while ensuring a proper power division between the output ports and providing a sufficient bandwidth with respect to return loss and isolation around the operating frequency. Computational cost of the optimization...
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Structure and computationally-efficient simulation-driven design of compact UWB monopole antenna
PublicationIn this letter, a structure of a small ultra-wideband (UWB) monopole antenna, its design optimization procedure as well as experimental validation are presented. According to our approach, antenna compactness is achieved by means of a meander line for current path enlargement as well as the two parameterized slits providing additional degrees of freedom that help to ensure good impedance matching. For the sake of reliability, the...
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Transmission Protocol Simulation Framework For The Resource-Constrained Wireless Sensor Network
PublicationIn this paper a prototype framework for simulation of wireless sensor network and its protocols are presented. The framework simulates operation of a sensor network with data transmission, which enables simultaneous development of the sensor network software, its hardware and the protocols for wireless data transmission. An advantage of using the framework is converging simulation with the real software. Instead of creating...
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Vision-based parking lot occupancy evaluation system using 2D separable discrete wavelet transform
PublicationA simple system for rough estimation of the occupancy of an ad-hoc organized parking lot is presented. A reasonably simple microprocessor hardware with a low resolution monochrome video camera observing the parking lot from the location high above the parking surface is capable of running the proposed 2-D separable discrete wavelet transform (DWT)-based algorithm, reporting the percentage of the observed parking area occupied by...
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Wykorzystanie metody Neldera-Meada do identyfikacji wartości parametrów niequasi-statycznego modelu małosygnałowego tranzystora MOS
PublicationW artykule zaprezentowano wyniki zastosowania metody sympleksu Neldera-Meada do ekstrakcji wartości parametrów niequasi-stycznego modelu małosygnałowego tranzystora MOS. Przedstawiono równoważny elektryczny schemat zastępczy i model matematyczny nowego modelu małosygnałowego MOSFETa dla częstotliwości mikrofalowych. Opisano zaimplementowany algorytm i otrzymane rezultaty badań.
Year 2014
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A quasi-2D small-signal MOSFET model - main results
PublicationMain results stemming from a new quasi 2D non-quasi-static small-signal four-terminal model of the MOSFET are presented in this work. The model is experimentally verified up to 30 GHz.
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A quasi-2D small-signal MOSFET model - main results
PublicationDynamic properties of the MOS transistor under small-signal excitation are determined by kinetic parameters of the carriers injected into the channel, i.e., the low-field mobility, velocity saturation, mobility at the quiescent-point (Q-point), longitudinal electric field in the channel, by dynamic properties of the channel, as well as by an electrical coupling between the perturbed carrier concentration in the channel and the...
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Analysis of Positioning Error and Its Impact on High Frequency Performance Parameters of Differential Signal Coupler of Differential Signal Coupler
PublicationThis paper presents the analysis of the effect of differential signal coupler positioning accuracy on its high frequency performance parameters for contact-less high speed chip-to-chip data transmission on PCB application. Our considerations are continuation of the previous works on differential signal coupler concept, design methodology and analysis for high speed data transmission monitoring presented in [1, 2]. The theoretical...
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Atomistic Surrogate-Based Optimization for Simulation-Driven Design of Computationally Expensive Microwave Circuits with Compact Footprints
PublicationA robust simulation-driven design methodology for computationally expensive microwave circuits with compact footprints has been presented. The general method introduced in this chapter is suitable for a wide class of N-port un-conventional microwave circuits constructed as a deviation from classic design solutions. Conventional electromagnetic (EM) simulation-driven design routines are generally prohibitive when applied to numerically...
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Bezprzewodowe zasilanie sensorów medycznych
PublicationW artykule przedstawiono problematykę bezprzewodowego zasilania miniaturowych sensorów medycznych. Przedyskutowano specyfikę bezprzewodowej transmisji mocy elektrycznej do sensorów, zwracając uwagę na potrzebę stosowania tej formy zasilania oraz na ograniczenia wynikające z limitów gęstości mocy dopuszczalnej dla żywych organizmów, w szczególności dla człowieka. Zaproponowano nowe podejście do bezprzewodowego przesyłu mocy wykorzystujące...
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Bezprzewodowe zasilanie sensorów medycznych
PublicationW artykule przedstawiono problematykę bezprzewodowego zasilania miniaturowych sensorów medycznych. Przedyskutowano specyfikę bezprzewodowej transmisji mocy elektrycznej do sensorów, zwracając uwagę na potrzebę stosowania tej formy zasilania oraz na ograniczenia wynikające z limitów gęstości mocy dopuszczalnej dla żywych organizmów, w szczególności dla człowieka. Zaproponowano nowe podejście do bezprzewodowej transmisji mocy wykorzystujące...
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Bulk linearized CMOS differential pair transconductor for continuous-time OTA-C filter design
PublicationIn this paper, the MOS differential pair driven simultaneously from gates and bulk terminals is described. An approximated analytical solution of the voltage to current transfer function has been found for the proposed circuit. Four possible combinations of gate and bulk connections of the input signal are presented. Basing on the configuration giving the best linearity, the operational transconductance amplifier (OTA) has been designed...
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Cyfrowy akcelerator wybranych modułów standardu kompresji wideo H.264
PublicationW komunikacie przedstawiono konfigurowalny cyfrowy akcelerator estymacji ruchu (motion estimation) przeznaczony dla enkodera wideo standardu H.264. Akcelerator został wstępnie zaimplementowany w układzie FPGA VIRTEX6-VLX365T, a następnie w układzie ASIC w technologii UMC 90 nm. Obie implementacje zostały zweryfikowane pozytywnie, a szczegółowe wyniki symulacji i pomiarów akceleratora ASIC zostały porównane z innymi dostępnymi w...
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Cyfrowy akcelerator wybranych modułów standardu kompresji wideo H.264
PublicationW artykule przedstawiono konfigurowalny cyfrowy akcelerator estymacji ruchu przeznaczony dla enkodera wideo standardu H.264. Akcelerator został zaimplementowany w technologii FPGA oraz w układzie ASIC w technologii UMC 90 nm. Obie implementacje zostały zweryfikowane, a szczegółowe wyniki pomiarów akceleratora ASIC zostały porównane z innymi dostępnymi w literaturze propozycjami. System został zoptymalizowany do współpracy z oprogramowaniem...
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Efficient Multi-Objective Simulation-Driven Antenna Design Using Co-Kriging
PublicationA methodology for fast multi-objective antenna optimization is presented. Our approach is based on response surface approximation (RSA) modeling and variable-fidelity electromagnetic (EM) simulations. In the design process, a computationally cheap RSA surrogate model constructed from sampled coarse-discretization EM antenna simulations is optimized using a multi-objective evolutionary algorithm. The initially determined Pareto...
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Expedited design of microstrip antenna subarrays using surrogate-based optimization
PublicationComputationally efficient simulation-driven design of microstrip antenna subarrays is presented. The proposed design approach aims at simultaneous adjustment of all relevant geometry parameters of the subarray, which allows us to take into account the effect of the feeding network on the subarray radiation pattern (in particular, the side lobe level, SLL). In order to handle a large number of variables involved in the design process,...
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Expedited EM-driven multi-objective antenna design in highly-dimensional parameter spaces
PublicationA technique for low-cost multi-objective optimization of antennas in highly-dimensional parameter spaces is presented. The optimization procedure is expedited by exploiting fast surrogate models, including coarse-discretization EM antenna simulations and response surface approximations (RSA). The latter is utilized to yield an initial set of Pareto non-dominated designs which are further refined using response correction methods....
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Low-cost EM-Simulation-based Multi-objective Design Optimization of Miniaturized Microwave Structures
PublicationIn this work, a simple yet reliable technique for fast multi-objective design optimization of miniaturized microwave structures is discussed. The proposed methodology is based on point-by-point identification of a Pareto-optimal set of designs representing the best possible trade-offs between conflicting objectives such as electrical performance parameters as well as the size of the structure of interest. For the sake of computational...
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Nested Space Mapping Technique for Design and Optimization of Complex Microwave Structures with Enhanced Functionality
PublicationIn this work, we discuss a robust simulation-driven methodology for rapid and reliable design of complex microwave/RF circuits with enhanced functionality. Our approach exploits nested space mapping (NSM) technology, which is dedicated to expedite simulation-driven design optimization of computationally demanding microwave structures with complex topologies. The enhanced func-tionality of the developed circuits is achieved by means...
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Rapid EM-Driven Design of Compact RF Circuits By Means of Nested Space Mapping
PublicationA methodology for rapid design of RF circuits constituted by compact microstrip resonant-cells (CMRCs) is presented. Our approach exploits nested space mapping (NSM) technology, where the inner SM layer is used to correct the equivalent circuit model at the CMRC level, whereas the outer layer enhances the coarse model of the entire structure under design. We demonstrate that NSM dramatically improves performance of surrogate-based...
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Realizacja przetwornika obrazu CMOS z wbudowaną konwersją A/C i cyfrowym układem CDS
PublicationW artykule przedstawiono realizację w technologii CMOS 180 nm przetwornika obrazu z wbudowaną konwersją analogowo-cyfrową oraz z funkcją cyfrowej redukcji szumu. Przedstawiona realizacja przetwornika obrazu różni się od znanych z literatury rozwiązań tym, że układ redukcji szumu CDS (Correlated Double Sampling) umieszczono w każdym pikselu obrazu. Dzięki tej modyfikacji możliwe jest zastąpienie migawki szczelinowej przez migawkę...
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Simulation-Driven Design of Microstrip Antenna Subarrays
PublicationA methodology for computationally efficient simulation-driven design of microstrip antenna subarrays is presented. Our approach takes into account the effect of the feed (e.g., a corporate network) on the subarray side lobe level and allows adjusting both radiation and reflection responses of the structure under design within a single automated process. This process is realized as surrogate-based optimization that produces designs...
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Square root RC Nyquist filter of fractional delay
PublicationIn this paper we propose a discrete-time FIR (finite impulse response) filter which couples the role of square root Nyquist filter with fractional delay filter. This filter enables to substitute for a cascade of square root RC (SRRC) Nyquist filter and fractional delay filter in one device/algorithm. The aim is to compensate for transmission delay in communication system. Statistically defined performances, e.g. BER (bit error...
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The contactless method of chip-to-chip high-speed data transmission monitoring
PublicationThis paper presents a technique of decoupling differential signals transmitted in a pair of microstrip lines on a printed circuit board (PCB), using dedicated coupler for high speed data transmission monitoring in chip-to-chip interconnections. The coupler used for signal probing is overlayed on the pair of microstrip lines under test, and provides a signal to the next blocks of the measurement system without disturbing transmission...
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Transmission protocol simulation framework for the resource-constrained sensor network
PublicationIn this paper the simulation framework for simulation of the sensor network protocol is presented. The framework enables the simultaneous development of the sensor network software and the protocol for the wireless data transmission. The advantage of using the framework is the convergence of the simulation with the real software, because the same software is used in real sensor network nodes and in the simulation framework. The...
Year 2013
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A New Coupler Concept for Contactless High-Speed Data Transmission Monitoring
PublicationThis paper presents a new concept of a couplerthat can be applied to high-speed data transmission contactlessmeasurements. The proposed approach is dedicated for differentialsignal transmission monitoring in microstrip coupled lineson printed circuit boards (PCBs). The coupler, produced on aseparate PCB, is overlayed on the transmission line with thedifferential signal and delivers decoupled differential signal tothe main measurement...
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A nine-input 1.25 mW, 34 ns CMOS analog median filter for image processing in real time
PublicationIn this paper an analog voltage-mode median filter, which operates on a 3 × 3 kernel is presented. The filter is implemented in a 0.35 μm CMOS technology. The proposed solution is based on voltage comparators and a bubble sort configuration. As a result, a fast (34 ns) time response with low power consumption (1.25 mW for 3.3 V) is achieved. The key advantage of the configuration is relatively high accuracy of signal processing,...
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A Quasi-2D MOSFET Model — 2D-to-Quasi-2D Transformation
PublicationA quasi-two-dimensional (quasi-2D) representation of the MOSFET channel is proposed in this work. The representation lays the foundations for a quasi 2D MOSFET model. The quasi 2D model is a result of a 2D into quasi 2D transformation. The basis for the transformation are an analysis of a current density vector field and such phenomena as Gradual Channel Detachment Effect (GCDE), Channel Thickness Modulation Effect (CTME), and...
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Al-DIAMOND SCHOTTKY TUNNEL DIODES WITH BARRIER HEIGHT CONTROL
PublicationFew-nanometer-thick very highly boron-doped p-type layers were fabricated at metal-semiconductor interfaces of Schottky barrier diodes formed with aluminum on polycrystalline diamond. Preliminary results show that hermionically-assisted tunneling mechanism results in lower voltage drops at forward biasing of these diodes than expected for the Al-diamond metal-semiconductor potential barrier B. The effective barrier height Bpeff...
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An Analog Sub-Miliwatt CMOS Image Sensor With Pixel-Level Convolution Processing
PublicationA new approach to an analog ultra-low power medium-resolution vision chip design is presented. The prototype chip performs low-level image processing algorithms in real time. Only a photo-diode, MOS switches and two capacitors are used to create an analog processing element (APE) that is able to realize any convolution algorithm based on a full 3x3 kernel. The proof-of-concept circuit is implemented in 0.35 µm CMOS technology,...
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Analogue CMOS ASICs in Image Processing Systems
PublicationIn this paper a survey of analog application specific integrated circuits (ASICs) for low-level image processing, called vision chips, is presented. Due to the specific requirements, the vision chips are designed using different architectures best suited to their functions. The main types of the vision chip architectures and their properties are presented and characterized on selected examples of prototype integrated circuits (ICs)...
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ASIC Design Example of Complex SoC with FPGA Prototyping
PublicationThe paper presents an example of the System on a Chip design, where the FPGA prototyping has been used. Two FPGA prototypes have been realized. The first FPGA prototype uses AVNET board containing Xilinx Virtex4 device accompanied by custom board with required devices. The second FPGA prototype has been built using the custom PCB with Xilinx Virtex-4 XC4VLX60 FPGA accompanied by all needed external components. The final system...
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ASIC Design Example of Complex SoC with FPGA Prototyping
PublicationThe paper presents an example of the System on a Chip design, where the FPGA prototyping has been used. Two FPGA prototypes have been realized. The first FPGA prototype uses AVNET board containing Xilinx Virtex4 device accompanied by custom board with required devices. The second FPGA prototype has been built using the custom PCB with Xilinx Virtex-4 XC4VLX60 FPGA accompanied by all needed external components. The final system...
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Book review: Simulation-Driven Design Optimisation and Modelling for Microwave Engineering
PublicationCelem książki jest przedstawienie aktualnego stanu badań dotyczących projektowania układów mikrofalowych poprzez modelowanie i optymalizacje wspomagane symulacjami elektromagnetycznymi. Grupa międzynarodowych ekspertów zajmujących się rożnymi aspektami komputerowo wspomaganego projektowania układów mikrofalowych, podsumowuje i dokonuje przeglądu ostatnich osiągnięć w tej dziedzinie oraz przedstawia szereg praktycznych zastosowań....
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CMOS implementation of an analogue median filter for image processing in real time
PublicationAn analogue median filter, realised in a 0.35 μm CMOS technology, is presented in this paper. The key advantages of the filter are: high speed of image processing (50 frames per second), low-power operation (below 1.25 mW under 3.3 V supply) and relatively high accuracy of signal processing. The presented filter is a part of an integrated circuit for image processing (a vision chip), containing: a photo-sensor matrix, a set of...
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Hardware-Software Implementation of a Sensor Network for CityTraffic Monitoring Using the FPGA- and ASIC-Based Sensor Nodes
PublicationArtykuł opisuje prototypową sieć sensorową do monitorowania ruchu pojazdów w mieście. Węzły sieci sensorowej, wyposażone w kamerę o niskiej rozdzielczości, obserwują ulice i wykrywają poruszające się obiekty. Detekcja obiektów jest realizowana w oparciu o własny algorytm segmentacji obrazów, wykorzystujący podwójne odejmowanie tła, wykrywanie krawędzi i cieni, działający na dedykowanym systemie mikroelektronicznym typu ''System...
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Measurements of Subnanometer Molecular Layers
PublicationSelected methods of formation and detection of nanometer and subnanometer molecular layers were shown. Additionally, a new method of detection and measurement with subnanometer resolution of layers adsorbed or bonded to the gate dielectric of the ion selective field effect transistor (ISFET) was presented.
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Metody redukcji zakłóceń w układach mikroelektronicznych
PublicationW pracy zaprezentowano zagadnienia dotyczące redukcji zakłóceń w układach scalonych wykonywanych w technologii CMOS i BiCMOS. Przedstawiono mechanizmy generacji zakłóceń, ich propagacji i oddziaływania na komponenty składowe systemów mikroelektronicznych wykonywanych w formie jednego układu scalonego. Zwrócono uwagę, że głównymi dragami rozprzestrzeniania się zakłóceń w strukturze układu scalonego są globalne sieci zasilające oraz...
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Pikselowy cyfrowy układ CDS przeznaczony do przetwornika obrazu CMOS
PublicationW artykule zaproponowano cyfrowy układ CDS (Correlated Double Sampling) przeznaczony do przetwornika obrazu CMOS. Układ różni się od klasycznych rozwiązań tym, że dwie pamięci przechowujące próbki sygnału wizyjnego zastąpiono jednym licznikiem rewersyjnym. Dzięki tej modyfikacji możliwa jest znaczna redukcja powierzchni układu CDS i umieszczenie go w każdym pikselu przetwornika obrazu CMOS. System został zaprojektowany i przesymulowany...
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Pikselowy cyfrowy układ CDS przeznaczony do przetwornika obrazu CMOS
PublicationW artykule zaproponowano cyfrowy układ CDS (Correlated Double Sampling) przeznaczony do przetwornika obrazu CMOS. Układ różni się od klasycznych rozwiązań tym, że dwie pamięci przechowujące próbki sygnału wizyjnego zastąpiono jednym licznikiem rewersyjnym. Dzięki tej modyfikacji możliwa jest znaczna redukcja powierzchni układu CDS i umieszczenie go w każdym pikselu przetwornika obrazu CMOS. System został zaprojektowany i przesymulowany...
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Scalony regulator o małym spadku napięcia i krótkiej odpowiedzi impulsowej
PublicationW artykule zaprezentowano projekt regulatora o małym spadku napięcia. Dzięki zastosowaniu wtórnika napięciowego o małej rezystancji wyjściowej, regulator cechuje się bardzo dobrą odpowiedzią impulsową, a ponadto nie wymaga dodatkowych zewnętrznych kondensatorów kompensujących. W związku z tym, zaproponowany regulator może być całkowicie scalony na podłożu półprzewodnikowym, co jest szczególnie korzystne w systemach realizowanych...
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System do prototypowania bezprzewodowych inteligentnych urządzeń monitoringu audio-video
PublicationW komunikacie przedstawiono system prototypowania bezprzewodowych urządzeń do monitoringu audio-video. System bazuje na układach FPGA Virtex6 i wielu dodatkowych wspierających urządzeniach jak: szybka pamięć DDR3, mała kamera HD, mikrofon z konwerterem A/C, moduł radiowy WiFi, itp. Funkcjonalność systemu została szczegółowo opisana w komunikacie. System został zoptymalizowany do pracy pod kontrolą systemu operacyjnego Linux, zostały...
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Technique to improve CMRR at high frequencies in CMOS OTA-C filters
PublicationIn this paper a technique to improve the common-mode rejection ratio (CMRR) at high frequencies in the OTA-C filters is proposed. The technique is applicable to most OTA-C filters using CMOS operational transconductance amplifiers (OTA) based on differential pairs. The presented analysis shows that a significant broadening of CMRR bandwidth can be achieved by using a differential pair with the bodies of transistors connected to...
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Wireless intelligent audio-video surveillance prototyping system
PublicationThe presented system is based on the Virtex6 FPGA and several supporting devices like a fast DDR3 memory, small HD camera, microphone with A/D converter, WiFi radio communication module, etc. The system is controlled by the Linux operating system. The Linux drivers for devices implemented in the system have been prepared. The system has been successfully verified in a H.264 compression accelerator prototype in which the most demanding...
Year 2012
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Characteristics of an image sensor with early-vision processing fabricated in standard 0.35 µm CMOS technology
PublicationThe article presents measurement results of prototype integrated circuits for acquisition and processing of images in real time. In order to verify a new concept of circuit solutions of analogue image processors, experimental integrated circuits were fabricated. The integrated circuits, designed in a standard 0.35 µm CMOS technology, contain the image sensor and analogue processors that perform low-level convolution-based image...
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Design of novel microstrip directional coupler for differential signal decoupling
PublicationThis study describes a concept of a novel microstrip directional coupler for differential signal decoupling, which can be used to digital signal overhearing on printed-circuit-boards. The complete design method is proposed with rules given analytically. Considered methodology is suitable for synthesis of couplers with low coupling factors, which have negligible influence on the transmission in main line. Theoretical considerations...