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Wyniki wyszukiwania dla: fptas
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A FPTAS for minimizing total completion time in a single machine time-dependent scheduling problem
PublikacjaIn this paper a single machine time-dependent scheduling problem with total completion time criterion is considered. There are given n jobs J1,…,Jn and the processing time pi of the ith job is given by pi=a+bisi, where si is the starting time of the ith job (i=1,…,n),bi is its deterioration rate and a is the common base processing time. If all jobs have deterioration rates different and not smaller than a certain constant u>0,...
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Network on Chip implementation using FPGAs resources
PublikacjaW artykule przedstawiono implementację sieci typu ''Network on Chip'' w układach FPGA. Sieci typu ''Network on Chip'' stały się bardzo interesującym i obiecującym rozwiązaniem dla systemów typu ''System on Chip'' które charakteryzują się intensywną komunikacją wewnętrzną. Ze względu na inne paradygmaty projektowania nie ma obecnie dostępnych efektywnych platform do budowy prototypów sieci typu ''Network on Chip'' i ich weryfikacji....
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Gradient adaptive lattice filter in FPGAS-implementation issues
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Approximation algorithms for job scheduling with block-type conflict graphs
PublikacjaThe problem of scheduling jobs on parallel machines (identical, uniform, or unrelated), under incompatibility relation modeled as a block graph, under the makespan optimality criterion, is considered in this paper. No two jobs that are in the relation (equivalently in the same block) may be scheduled on the same machine in this model. The presented model stems from a well-established line of research combining scheduling theory...
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Scheduling with Complete Multipartite Incompatibility Graph on Parallel Machines: Complexity and Algorithms
PublikacjaIn this paper, the problem of scheduling on parallel machines with a presence of incompatibilities between jobs is considered. The incompatibility relation can be modeled as a complete multipartite graph in which each edge denotes a pair of jobs that cannot be scheduled on the same machine. The paper provides several results concerning schedules, optimal or approximate with respect to the two most popular criteria of optimality:...
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Routing Method for Interplanetary Satellite Communication in IoT Networks Based on IPv6
PublikacjaThe matter of interplanetary network (IPN) connection is a complex and sophisticated topic. Space missions are aimed inter alia at studying the outer planets of our solar system. Data transmission itself, as well as receiving data from satellites located on the borders of the solar system, was only possible thanks to the use of powerful deep space network (DSN) receivers, located in various places on the surface of the Earth. In...
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Scheduling on Uniform and Unrelated Machines with Bipartite Incompatibility Graphs
PublikacjaThe problem of scheduling jobs on parallel machines under an incompatibility relation is considered in this paper. In this model, a binary relation between jobs is given and no two jobs that are in the relation can be scheduled on the same machine. We consider job scheduling under the incompatibility relation modeled by a bipartite graph, under the makespan optimality criterion, on uniform and unrelated machines. Unrelated machines...
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Speed sensorless induction motor drive with predictive current controller
PublikacjaToday, speed sensorless modes of operation are becoming standard solutions in the area of electric drives. This paper presents a speed sensorless control system of an induction motor with a predictive current controller. A closed-loop estimation system with robustness against motor parameter variation is used for the control approach. The proposed algorithm has been implemented using field-programmable gate arrays (FPGAs) and a...
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Verification and Benchmarking in MPA Coprocessor Design Process
PublikacjaThis paper presents verification and benchmarking required for the development of a coprocessor digital circuit for integer multiple-precision arithmetic (MPA). Its code is developed, with the use of very high speed integrated circuit hardware description language (VHDL), as an intellectual property core. Therefore, it can be used by a final user within their own computing system based on field-programmable gate arrays (FPGAs)....
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Approximation Strategies for Generalized Binary Search in Weighted Trees
PublikacjaWe consider the following generalization of the binary search problem. A search strategy is required to locate an unknown target node t in a given tree T. Upon querying a node v of the tree, the strategy receives as a reply an indication of the connected component of T\{v} containing the target t. The cost of querying each node is given by a known non-negative weight function, and the considered objective is to minimize the total...
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Open-Source Coprocessor for Integer Multiple Precision Arithmetic
PublikacjaThis paper presents an open-source digital circuit of the coprocessor for an integer multiple-precision arithmetic (MPA). The purpose of this coprocessor is to support a central processing unit (CPU) by offloading computations requiring integer precision higher than 32/64 bits. The coprocessor is developed using the very high speed integrated circuit hardware description language (VHDL) as an intellectual property (IP) core. Therefore,...
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FPGA implementation of the multiplication operation in multiple-precision arithmetic
PublikacjaAlthough standard 32/64-bit arithmetic is sufficient to solve most of the scientific-computing problems, there are still problems that require higher numerical precision. Multiple-precision arithmetic (MPA) libraries are software tools for emulation of computations in a user-defined precision. However, availability of a reconfigurable cards based on field-programmable gate arrays (FPGAs) in computing systems allows one to implement...
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IP Core of Coprocessor for Multiple-Precision-Arithmetic Computations
PublikacjaIn this paper, we present an IP core of coprocessor supporting computations requiring integer multiple-precision arithmetic (MPA). Whilst standard 32/64-bit arithmetic is sufficient to solve many computing problems, there are still applications that require higher numerical precision. Hence, the purpose of the developed coprocessor is to support and offload central processing unit (CPU) in such computations. The developed digital...