A New, Reconfigurable Circuit Offering Functionality of AND and OR Logic Gates for Use in Algorithms Implemented in Hardware

Tomasz Talaśka; Rafał Długosz; Tatjana Nikolić; Goran Nikolić; Tomasz Stefański; Michał Długosz; Michał Talaśka

doi:10.1109/miel58498.2023.10315945

A New, Reconfigurable Circuit Offering Functionality of AND and OR Logic Gates for Use in Algorithms Implemented in Hardware

Abstract

The paper presents a programmable (using a 1-bit signal) digital gate that can operate in one of two OR or AND modes. A circuit of this type can also be implemented using conventional logic gates. However, in the case of the proposed circuit, compared to conventional solutions, the advantage is a much smaller number of transistors necessary for its implementation. Circuit is also much faster than its conventional counterpart. The logic gate was implemented in the 180nm CMOS technology and verified using Hspice simulations. There are many possible applications for this gate, mostly in artificial intelligence and pattern recognition algorithms implemented at the transistor level.

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Authors (7)

Tomasz Talaśka
Rafał Długosz
Tatjana Nikolić
Goran Nikolić
Tomasz Stefański dr hab. inż.
Michał Długosz
Michał Talaśka

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Category:

Conference activity

Type:

publikacja w wydawnictwie zbiorowym recenzowanym (także w materiałach konferencyjnych)

Language:

English

Publication year:

2023

Bibliographic description:

Talaśka T., Długosz R., Nikolić T., Nikolić G., Stefański T., Długosz M., Talaśka M.: A New, Reconfigurable Circuit Offering Functionality of AND and OR Logic Gates for Use in Algorithms Implemented in Hardware// / : , 2023,

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