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Abstract
Residue scaling is needed in pipelined FFT radix-4 processors based on the Modified Quadratic Residue Number System (MQRNS) at the output of each butterfly. Such processor uses serial connection of radix-4 butterflies. Each butterfly comprises n subunits, one for each modulus of the RNS base and outputs four complex residue numbers. In order to prevent the arithmetic overflow in the succesive stage, every number has to be scaled, i.e. divided by a certain constant. The dynamic range of the processed signal increases due to the summation within the butterfly and the transformation of coefficients of the FFT algorithm to integers. The direct approach would require eight residue scalers that would be highly ineffective regarding that such a set of scalers had to be placed after each butterfly. We show and analyze a structure which uses parallel-to-serial transformation of groups of samples representing real and imaginary parts so that only two scalers are needed.
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- Category:
- Articles
- Type:
- artykuły w czasopismach recenzowanych i innych wydawnictwach ciągłych
- Published in:
-
Poznan University of Technology Academic Journals. Electrical Engineering
edition 80,
pages 145 - 150,
ISSN: 1897-0737 - Language:
- English
- Publication year:
- 2014
- Bibliographic description:
- Czyżak M., Smyk R.: On configuration of residue scaling process in pipelined radix-4 MQRNS FFT processor// Poznan University of Technology Academic Journals. Electrical Engineering. -., iss. 80 (2014), s.145-150
- Verified by:
- Gdańsk University of Technology
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