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Abstract
A new approach to an analog ultra-low power medium-resolution vision chip design is presented. The prototype chip performs low-level image processing algorithms in real time. Only a photo-diode, MOS switches and two capacitors are used to create an analog processing element (APE) that is able to realize any convolution algorithm based on a full 3x3 kernel. The proof-of-concept circuit is implemented in 0.35 µm CMOS technology, and contains a 64x64 SIMD matrix with embedded APEs. The matrix dissipates less than 0.3 mW (less than 0.1 µW per APE) of power under 3.3 V supply, and its image processing speed is up to 100 frames/s.
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- Category:
- Articles
- Type:
- artykuł w czasopiśmie wyróżnionym w JCR
- Published in:
-
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
no. 60,
edition 2,
pages 279 - 289,
ISSN: 1549-8328 - Language:
- English
- Publication year:
- 2013
- Bibliographic description:
- Jendernalik W., Blakiewicz G., Jakusz J., Szczepański S., Piotrowski R.: An Analog Sub-Miliwatt CMOS Image Sensor With Pixel-Level Convolution Processing// IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS. -Vol. 60, iss. 2 (2013), s.279-289
- DOI:
- Digital Object Identifier (open in new tab) 10.1109/tcsi.2012.2215803
- Verified by:
- Gdańsk University of Technology
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