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  • High-Speed Serial Embedded Deterministic Test for System-on-Chip Designs

    Publication
    • G. Mrugalski
    • N. Mukherejee
    • A. Pogiel
    • J. Rajski
    • M. Trawka
    • J. Tyszer

    - Year 2014

    The paper presents a high-speed serial interface between external tester and Embedded Deterministic Test (EDT) compression logic hosted by SoC designs. With only a single bidirectional link, the system is capable of feeding distributed heterogeneous cores with hundreds of test channels. Moreover, it synergistically supports EDT bandwidth management to improve the overall test performance. A detailed study indicates a high potential...

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