The paper presents a high-speed serial interface between external tester and Embedded Deterministic Test (EDT) compression logic hosted by SoC designs. With only a single bidirectional link, the system is capable of feeding distributed heterogeneous cores with hundreds of test channels. Moreover, it synergistically supports EDT bandwidth management to improve the overall test performance. A detailed study indicates a high potential...

Test suites for embedded systems are typically created from scratch using dif- ferent, often inadequate methods. In consequence, industry branches dealing with software-intensive embedded systems have to cope with quality problems, even though test processes are particularly time-consuming and costly. Based on an evolving model-based testing methodology we introduce test design patterns for simplifying and accelerating...

Systematic Test Data Generation for Embedded Software

The new solution of a BIST called the JTAG BIST for self-testing of analog parts of electronic embedded systems is presented in the paper. The JTAG BIST consists of the BCT8244A and SCANSTA476 integrated circuits of Texas Instruments controlled via the IEEE 1149.1 bus. The BCT8244A is a scan test device with octal buffers, and the SCANSTA476 is a 12-bit ADC with 8 analog input channels. Self-testing approach is based on the fault...

From Functional Requirements through Test Evaluation Design to Automatic Test Data Retrieval – a Concept for Testing of Software Dedicated for Hybrid Embedded Systems