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FPGA Acceleration of Matrix-Assembly Phase of RWG-Based MoM

Abstract

In this letter, the field-programmable-gate-array accelerated implementation of matrix-assembly phase of the method of moments (MoM) is presented. The solution is based on a discretization of the frequency-domain mixed potential integral equation using the Rao-Wilton-Glisson basis functions and their extension to wire-to-surface junctions. To take advantage of the given hardware resources (i.e., Xilinx Alveo U200 accelerator card), nine independent processing paths/runtime efficient compute units are developed and synthesized. Numerical results provided for a quadrifilar spiral antenna mounted on a conductive handset box show that the proposed parallelization scheme performs 9.53× faster than a traditional (i.e., serial) central processing unit (CPU) MoM implementation, and about 1.67× faster than a parallel six-core CPU MoM implementation.

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DOI:
Digital Object Identifier (open in new tab) 10.1109/LAWP.2022.3183168
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Copyright (2022 IEEE)

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Details

Category:
Articles
Type:
artykuły w czasopismach
Published in:
IEEE Antennas and Wireless Propagation Letters no. 21, pages 1847 - 1851,
ISSN: 1536-1225
Language:
English
Publication year:
2022
Bibliographic description:
Topa T., Noga A., Stefański T.: FPGA Acceleration of Matrix-Assembly Phase of RWG-Based MoM// IEEE Antennas and Wireless Propagation Letters -Vol. 21,iss. 9 (2022), s.1847-1851
DOI:
Digital Object Identifier (open in new tab) 10.1109/lawp.2022.3183168
Sources of funding:
  • Free publication
Verified by:
Gdańsk University of Technology

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