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Search results for: cascaded inverter
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Selective Harmonic Elimination PWM For a Cascaded Multi-level Inverter
PublicationThis paper deals with the selective harmonic elimination pulse width modulation (SHE-PWM) technique. This technique is used for the elimination of selected dominant low order harmonics in the multi-level inverter output voltage. The presence of these harmonics is the essential drawback of such kind of inverters; especially when it is used for the control of different AC drivers. The SHE-PWM is based...
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CCM and DCM operation analysis of cascaded quasi-Z-source inverter
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Pulse-Width Modulation Template for Five-Level Switch-Clamped H-Bridge-Based Cascaded Multilevel Inverter
PublicationThis article presents a carrier-based pulse-width modulation (PWM) template for a 5-level, H bridge-based cascaded multilevel inverter (MLI). The developed control concept generates adequate modulation template for this inverter topology wherein a sinusoidal modulating waveform is modified to fit in a single triangular carrier signal range. With this modulation approach, classical multiplicity and synchronization of the triangular...
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Space-vector pulsewidth modulation for a seven-level cascaded H-bridge inverter with the control of DC-link voltages
PublicationThe control strategy of DC-link voltages for a seven-level Cascaded H-Bridge inverter is proposed in this paper. The DC-link voltage balancing is accomplished by appropriate selection of H-Bridges and control of their duty cycles in Space-Vector Modulation (SVM) algorithm. The proposed SVM method allows to maintain the same voltage level on all inverter capacitors. Regardless of the balancing function, the...
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Space Vector Pulsewidth Modulation Strategy for Multilevel Cascaded H-Bridge Inverter With DC-Link Voltage Balancing Ability
PublicationSpace vector pulsewidth modulation (SVPWM) algorithms for cascaded H-bridge multilevel (CHB ML) inverter usually provide the possibility of using several combinations of active voltage vectors to generate the same output voltage vector. For preselected H-bridges, some of them may generate output voltages opposite to the assumed direction. This results in the change of the dc-link voltages of these H-bridges in the opposite direction...
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Hybridized SVPWM Algorithm for Multilevel CHB Inverter With DC-Link Voltage Control Capability
PublicationThe deployment of a space vector pulsewidth modulation (SVPWM) scheme in controlling cascaded H-bridge multilevel inverter (CHB MLI) is quite challenging; especially, when a substantial number of output voltage levels are involved and the dc-link voltages are out of balance. In this article, a simple SVPWM algorithm for CHB MLI is proposed. In the proposed algorithm, all the H-bridges in an inverter phase are treated as a single...
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A Single-Carrier-Based Pulse-Width Modulation Template for Cascaded H-Bridge Multilevel Inverters
PublicationMultiplicity of the triangular carrier signals is a criterion for the extension of sinusoidal pulsewidth modulation, SPWM, to a number of output voltage levels per phase-leg in cascaded H-bridge (CHB) multilevel inverter (MLI). Considering medium and high voltage applications where appreciable number of output voltage levels from CHB MLI is needed, commensurate high number of carrier signals in either classical level- or phase-shifted...
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Dual Active Bridge (DAB) DC-DC converter for multilevel propulsion converters for electrical multiple units (EMU)
PublicationSemiconductor power devices made from silicon carbide (SiC) reached a level of technology enabling their widespread use in power converters. Two different approaches to implementation of modern traction converters in electric multiple units (EMU) have been presented in recent years: (i) 3.3-kV SiC MOSFET-based three-level PWM inverter with regenerative braking and (ii) 6.5-kV IGBT-based four-quadrant power electronic traction transformer...