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Hybrid‐mode single‐slope ADC with improved linearity and reduced conversion time for CMOS image sensors

Abstract

In the paper, a single‐slope analog‐to‐digital converter (ADC) for integrated CMOS image sensor applications with an improved technique of conversion has been proposed. The proposed hybrid‐mode ADC automatically uses one of the following conversion techniques: time based (i.e. PWM) or voltage based (i.e. single‐slope). During the ADC operation, the clock frequency and reference voltage are modified in order to reduce the conversion time and achieve the optimal linearity. Owing to this, the pixel using a photodiode working in the integration mode achieves a linear photoconversion characteristics (irradiance to digital number), and the conversion period, which is determined by the darkest parts of a scene, is reduced by an order of magnitude comparing with known ADC solutions. The proposed conversion technique has been validated with the ASIC prototype of a CMOS imager containing photosensors integrated with the ADCs. The ASIC was fabricated in standard 0.18 μm CMOS technology. A specialized measurement system has been used to optimize linearity in the hybrid‐mode conversion (integral nonlinearity below 2 LSB). The conversion period has been reduced 15 times compared with the standard technique. Measurements confirm functionality of the proposed approach, implemented within a small pixel area.

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Accepted or Published Version
DOI:
Digital Object Identifier (open in new tab) 10.1002/cta.2713
License
Copyright (2019 John Wiley & Sons, Ltd.)

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Details

Category:
Articles
Type:
artykuły w czasopismach
Published in:
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS no. 48, pages 28 - 41,
ISSN: 0098-9886
Language:
English
Publication year:
2020
Bibliographic description:
Kłosowski M.: Hybrid‐mode single‐slope ADC with improved linearity and reduced conversion time for CMOS image sensors// INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS -Vol. 48,iss. 1 (2020), s.28-41
DOI:
Digital Object Identifier (open in new tab) 10.1002/cta.2713
Sources of funding:
Verified by:
Gdańsk University of Technology

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