—Multilevel inverters become more and more popular, especially in the medium or high voltage and high power applications. Unfortunately, some of inverter topologies require additional DC bus voltage balancing systems. This paper presents a novel approach to such systems, which is based on a multiple terminal DAB converter. Along with the voltage balancing function the proposed solution enables the connection of energy storage devices...

This article presents the design and control of 4L-DC back-to-back converter. To solve the DC link voltage balancing problem in four-level converter a new three-level double chopper topology based on PO-PWM modulation was designed and successfully tested. Also, the paper describes two phase space vector pulse width modulation 2P-SVPWM based on the shape function of finite elements. The control structure with modified Dead-Beat...

The work presents the design process of the TCS/RNS (two's complement–to– residue) converter in Xilinx FPGA with the use of HLS approach. This new approach allows for the design of dedicated FPGA circuits using high level languages such as C++ language. Such approach replaces, to some extent, much more tedious design with VHDL or Verilog and facilitates the design process. The algorithm realized by the given hardware circuit is...

An experimental high-level synthesis (HLS) of the residue number system (RNS) to two’s-complement system (TCS) converter in the Vivado Xilinx FPGA environment is shown. The assumed approach makes use of the Chinese Remainder Theorem I (CRT I). The HLS simplifies and accelerates the design and implementation process, moreover the HLS synthesized architecture requires less hardware by about 20% but the operational frequency is smaller...