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Abstract
An analogue median filter, realised in a 0.35 μm CMOS technology, is presented in this paper. The key advantages of the filter are: high speed of image processing (50 frames per second), low-power operation (below 1.25 mW under 3.3 V supply) and relatively high accuracy of signal processing. The presented filter is a part of an integrated circuit for image processing (a vision chip), containing: a photo-sensor matrix, a set of analogue pre-processors, and interface circuits. The analysis of the main parameters of the considered median filter is presented. The discussion of important limitations in the operation of the filter due to the restrictions imposed by CMOS technology is also presented.
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- Accepted or Published Version
- DOI:
- Digital Object Identifier (open in new tab) 10.2478/bpasts-2013-0077
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- Category:
- Articles
- Type:
- artykuł w czasopiśmie wyróżnionym w JCR
- Published in:
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Bulletin of the Polish Academy of Sciences-Technical Sciences
no. 61,
pages 725 - 730,
ISSN: 0239-7528 - Language:
- English
- Publication year:
- 2013
- Bibliographic description:
- Jendernalik W., Jakusz J., Blakiewicz G., Szczepański S.: CMOS implementation of an analogue median filter for image processing in real time// Bulletin of the Polish Academy of Sciences-Technical Sciences. -Vol. 61, iss. 3 (2013), s.725-730
- DOI:
- Digital Object Identifier (open in new tab) 10.2478/bpasts-2013-0077
- Verified by:
- Gdańsk University of Technology
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