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Efficient FPGA Implementation of an RFIR Filter Using the APC–OMS Technique with WTM for High-Throughput Signal Processing
Abstract
Nowadays, Finite Impulse Response (FIR) filters are used to change the attributes of a signal in the time or frequency domain. Among FIR filters, a reconfigurable filter has the advantage of changing the coefficient in real-time, while performing the operation. In this paper, the Anti-Symmetric Product Coding (APC) and Odd Multiple Storage (OMS) modules are utilized to implement the reconfigurable FIR filter (RFIR–APC–OMS). Herein, the APC–OMS module is used to reduce the area of the RFIR architecture. The performance of the RFIR–APC–OMS is analyzed in terms of: area, power, delay, LUT, flip flop, slices, and frequency. RFIR–APC–OMS has reduced 3.44% of area compared to the existing RFIR architecture employing the Dynamic Reconfigurable Partial Product Generator (DRPPG) module.
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Authors (5)
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Kasarla Satish Reddy
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Sowmya Madhavan
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Parameshachari Bidare Divakarachari
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Arun Mathiyalagan
Cite as
Full text
- Publication version
- Accepted or Published Version
- DOI:
- Digital Object Identifier (open in new tab) 10.3390/electronics11193118
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Details
- Category:
- Articles
- Type:
- artykuły w czasopismach
- Published in:
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Electronics
no. 11,
ISSN: 2079-9292 - Language:
- English
- Publication year:
- 2022
- Bibliographic description:
- Satish Reddy K., Madhavan S., Falkowski-Gilski P., Divakarachari P. B., Mathiyalagan A.: Efficient FPGA Implementation of an RFIR Filter Using the APC–OMS Technique with WTM for High-Throughput Signal Processing// Electronics -Vol. 11,iss. 19 (2022), s.3118-
- DOI:
- Digital Object Identifier (open in new tab) 10.3390/electronics11193118
- Sources of funding:
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- Free publication
- Verified by:
- Gdańsk University of Technology
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