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Search results for: MULTILEVEL INVERTER
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Series Passive Compensation of Common Mode Voltage in Multilevel Inverter Drives
PublicationThis paper presents an approach to the problem of a magnetic saturation of CM chokes that accompanies the method of passive compensation of a common mode (CM) voltage in an inverter drive system. Measurements have been provided in a drive system including multilevel inverters and the filter having sinusoidal output voltages and zero CM voltage. The theoretical analysis and experimental results show that the problem with magnetic...
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Multilevel inverter neutral-point voltage sensor diagnostic based on the Extended Kalman Filter
PublicationA new algorithm for neutral point voltage imbalance estimation in DC link of the three-level (3L) neutral point clamped (NPC) voltage source inverter (VSI) is proposed. Application of the proposed algorithm does not require any additional sensors. The unbalanced voltage calculation is based on the information derived from the inverter output measured currents and from the knowledge of the load model parameters. In order to estimate...
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Pulse-Width Modulation Template for Five-Level Switch-Clamped H-Bridge-Based Cascaded Multilevel Inverter
PublicationThis article presents a carrier-based pulse-width modulation (PWM) template for a 5-level, H bridge-based cascaded multilevel inverter (MLI). The developed control concept generates adequate modulation template for this inverter topology wherein a sinusoidal modulating waveform is modified to fit in a single triangular carrier signal range. With this modulation approach, classical multiplicity and synchronization of the triangular...
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Comparison of Impedance-Source Networks for Two and Multilevel Buck–Boost Inverter Applications
Publicationmpedance-source networks are an increasingly popular solution in power converter applications, especially in single-stage buck-boost power conversion to avoid additional front-end dc-dc power converters. In the survey papers published, no analytical comparisons of different topologies have been described, which makes it difficult to choose the best option. Thus, the aim of this paper is to present a comprehensive analytical comparison...
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Space Vector Pulsewidth Modulation Strategy for Multilevel Cascaded H-Bridge Inverter With DC-Link Voltage Balancing Ability
PublicationSpace vector pulsewidth modulation (SVPWM) algorithms for cascaded H-bridge multilevel (CHB ML) inverter usually provide the possibility of using several combinations of active voltage vectors to generate the same output voltage vector. For preselected H-bridges, some of them may generate output voltages opposite to the assumed direction. This results in the change of the dc-link voltages of these H-bridges in the opposite direction...
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Space vector modulation in multilevel inverters of the servo drives of the trajectory measurements telescopes
PublicationUsing the MatLab/Simulink mathematical model of a three-phase three-level voltage inverter, the influence of the space-vector modulation (SVM) algorithm on the pulsations of the current (torque) of an AC motor in the range of low rotation speeds is considered. It is shown that the SVM of the second kind does not provide a pulsations level comparable to the pulsations of a sinusoidal pulse-width modulation (SPWM), both in the static...
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Novel Family of modified qZS buck-boost multilevel inverters with reduced switch count
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A Single-Carrier-Based Pulse-Width Modulation Template for Cascaded H-Bridge Multilevel Inverters
PublicationMultiplicity of the triangular carrier signals is a criterion for the extension of sinusoidal pulsewidth modulation, SPWM, to a number of output voltage levels per phase-leg in cascaded H-bridge (CHB) multilevel inverter (MLI). Considering medium and high voltage applications where appreciable number of output voltage levels from CHB MLI is needed, commensurate high number of carrier signals in either classical level- or phase-shifted...
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Reduction of Conducted Emissions Generated by WPT Systems with Multilevel Inverters using Spread Spectrum Approach
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Novel Family of Single-Phase Modified Impedance-Source Buck-Boost Multilevel Inverters With Reduced Switch Count
Publicationhis paper describes novel single-phase solutions with increased inverter voltage levels derived by means of a nonstandard inverter configuration and impedance source networks. Operation principles based on special modulation techniques are presented. Detailed component design guidelines along with simulation and experimental verification are also provided. Possible application fields are discussed, as well as advantages and disadvantages....
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Marek Adamowicz dr hab. inż.
PeopleStopień naukowy doktora uzyskał w 2008 r. na Wydziale Elektrotechniki i Automatyki Politechniki Gdańskiej. W latach 2005 – 2011 pracował na Akademii Morskiej w Gdyni. W 2010 r. jako laureat programu NCBR LIDER wybrał Wydział Elektrotechniki i Automatyki Politechniki Gdańskiej jako jednostkę realizującą swój projekt z zakresu szerokopasmowych przyrządów półprzewodnikowych i ich zastosowań w elektrowniach wiatrowych. Od 2011 roku...
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Single-phase, Five-level Inverter with SPWM-Based Neutral Point Voltage Balancing Scheme
PublicationMultilevel inverter topologies provide several advantages over two-level inverter configuration. These benefits are the reason for the growing interest in multilevel topologies among research society. One of the most popular topological concepts (diode and active switch clamping) requires neutral-point potential balancing due to series-connected capacitor banks across the input dc link in such derived inverter configurations. This...
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Three-Level Z-Source Neutral-Point-Clamped Inverter
PublicationThe paper describes construction and the principles of activity, attributes and potential of 3-phase Z-type inverters. The paper focuses on the basic system and suggested 3-level system of a NPC type Z-inverter, which was elaborated by authors. Simplified theoretical analysis of both systems has been verified by detailed simulation research. In the last section of the article, the possibility to build multilevel Z- inverters based...
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Four level inverter's DC bus voltage balancing with 3-terminal DAB converter
Publication—Multilevel inverters become more and more popular, especially in the medium or high voltage and high power applications. Unfortunately, some of inverter topologies require additional DC bus voltage balancing systems. This paper presents a novel approach to such systems, which is based on a multiple terminal DAB converter. Along with the voltage balancing function the proposed solution enables the connection of energy storage devices...
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Power Surge Compensator based on a Four Level Diode Clamped Inverter for ship application. Average model
PublicationPaper presents continuous average value model of Power Surge Compensator based on a Four Level Diode Clamped Inverter with super capacitor as a energy storage device. This conditioner is design for power surge or fluctuation elimination, by compensating it with energy stored in ESD. Continuous average value model of multilevel S-PWM has been presented also. Summary of raised problem is a simulation model made in PowerSim Psim 8...
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MPPT and GMPPT Implementation for Buck-Boost Mode Control of quasi-Z-Source Inverter
PublicationThe focus is on the maximum power point tracking implementation for the buck-boost voltage mode control of a single-phase multilevel inverter based on a three-level neutral point clamped quasi-Z-source topology. To utilize shoot-through states only when boost function is needed and avoid it in the buck mode, two different control approaches are required. This work proposes merged control system which provides switching between...
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Pulse-Width Modulation of Power Electronic DC–AC Converter
PublicationThe Second Edition of High Performance Control of AC Drives with Matlab®/Simulink delivers an updated and thorough overview of topics central to the understanding of AC motor drive systems. The book includes new material on medium voltage drives, covering state-of-the-art technologies and challenges in the industrial drive system, as well as their components, and control, current source inverter-based drives, PWM techniques for...
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Multi-pulse VSC arrangements with coupled reactors
PublicationThis paper presents a novel approach to the multipulse VSC (Voltage Source Converter) arrangements based on several conventional inverter modules connected in parallel by using coupled reactors. This solution reduces the THD of the output voltage, despite the low switching frequency of transistors. The advantage of the proposed solution is also a relatively small rated power of the reactors. Proposed new arrangements for different...
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Closed-Loop Control System Design for Wireless Charging of Low-Voltage EV Batteries with Time-Delay Constraints
PublicationThis paper presents an inductive power transfer system on the basis of a double single- phase three-level T-type inverter and two split transmitting coils for constant current and constant voltage wireless charging of low-voltage light electric vehicle batteries with closed-loop control, considering time-delay communication constraints. An optimal control structure and a modified control strategy were chosen and implemented to...
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Dead-Time Effect Compensation Based on Additional Phase Current Measurements
PublicationThis paper proposes a new method of dead-time effect compensation. The proposed solution is based on additional phase current measurements realized by analog-to-digital converters. These measurements are carried out at the time instants specified by a pulsewidth-modulation (PWM) strategy. This makes it possible to estimate inverter currents at the commutation instants and, finally, to estimate the voltage error caused by dead time. This...