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Wyniki wyszukiwania dla: MULTI-CORE CPU
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Acceleration of Electromagnetic Simulations on Reconfigurable FPGA Card
PublikacjaIn this contribution, the hardware acceleration of electromagnetic simulations on the reconfigurable field-programmable-gate-array (FPGA) card is presented. In the developed implementation of scientific computations, the matrix-assembly phase of the method of moments (MoM) is accelerated on the Xilinx Alveo U200 card. The computational method involves discretization of the frequency-domain mixed potential integral equation using...
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Tuning matrix-vector multiplication on GPU
PublikacjaA matrix times vector multiplication (matvec) is a cornerstone operation in iterative methods of solving large sparse systems of equations such as the conjugate gradients method (cg), the minimal residual method (minres), the generalized residual method (gmres) and exerts an influence on overall performance of those methods. An implementation of matvec is particularly demanding when one executes computations on a GPU (Graphics...
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Benchmarking Performance of a Hybrid Intel Xeon/Xeon Phi System for Parallel Computation of Similarity Measures Between Large Vectors
PublikacjaThe paper deals with parallelization of computing similarity measures between large vectors. Such computations are important components within many applications and consequently are of high importance. Rather than focusing on optimization of the algorithm itself, assuming specific measures, the paper assumes a general scheme for finding similarity measures for all pairs of vectors and investigates optimizations for scalability...
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A memory efficient and fast sparse matrix vector product on a Gpu
PublikacjaThis paper proposes a new sparse matrix storage format which allows an efficient implementation of a sparse matrix vector product on a Fermi Graphics Processing Unit (GPU). Unlike previous formats it has both low memory footprint and good throughput. The new format, which we call Sliced ELLR-T has been designed specifically for accelerating the iterative solution of a large sparse and complex-valued system of linear equations arising...
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Implementation of Addition and Subtraction Operations in Multiple Precision Arithmetic
PublikacjaIn this paper, we present a digital circuit of arithmetic unit implementing addition and subtraction operations in multiple-precision arithmetic (MPA). This adder-subtractor unit is a part of MPA coprocessor supporting and offloading the central processing unit (CPU) in computations requiring precision higher than 32/64 bits. Although addition and subtraction operations of two n-digit numbers require O(n) operations, the efficient...
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Evaluation the effectiveness of virtual machine integrated with CPU
PublikacjaIn the paper effectiveness of example CPU with integrated virtual machine is presented. The idea and implementation of virtual machine is shown. In next sections reference CPU and sample virtual machine is described. Finally optimality of the translation process is analysed.
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Auto-tuning methodology for configuration and application parameters of hybrid CPU + GPU parallel systems based on expert knowledge
PublikacjaAuto-tuning of configuration and application param- eters allows to achieve significant performance gains in many contemporary compute-intensive applications. Feasible search spaces of parameters tend to become too big to allow for exhaustive search in the auto-tuning process. Expert knowledge about the utilized computing systems becomes useful to prune the search space and new methodologies are needed in the face of emerging heterogeneous...
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Wielopoziomowy przekształtnik trakcyjny SiC z izolacją od sieci 3kV DC realizowaną za pomocą transformatorów 30kHz do napędów EZT
PublikacjaW referacie przedstawiono wielopoziomowy izolowany kaskadowy przekształtnik DC-AC z tranzystorami SiC MOSFET 1,2kV, przeznaczony do napędów elektrycznych zespołów trakcyjnych (EZT). Zaproponowana konstrukcja przekształtnika, przeznaczonego do pracy przy zasilaniu z sieci trakcyjnej 3kV DC, spełnia założenia energoelektronicznego transformatora trakcyjnego (z ang. Power Electronic Traction Transformer). Budowa modułowa z niskonapięciowych...
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Parallelization of large vector similarity computations in a hybrid CPU+GPU environment
PublikacjaThe paper presents design, implementation and tuning of a hybrid parallel OpenMP+CUDA code for computation of similarity between pairs of a large number of multidimensional vectors. The problem has a wide range of applications, and consequently its optimization is of high importance, especially on currently widespread hybrid CPU+GPU systems targeted in the paper. The following are presented and tested for computation of all vector...
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