Wyniki wyszukiwania dla: THREE-LEVEL VOLTAGE INVERTER
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THREE-LEVEL F-TYPE INVERTER
PublikacjaGiven the recent available IGBT switch modules up to 6.5 kV, 1200 A rating, the prospect of the diode-free variant topology of the three-level neutral-point-clamped (3-level, T-type) inverter in certain medium voltage applications is bright; due to its small part count and low conduction losses compared to the diode-clamped NPC inverter. However, within this voltage range, the input dc voltage rating of 50% of the switches per...
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Modified SPWM Technique with Zero-Sequence Voltage Injection for a Five-Phase, Three-Level NPC Inverter
PublikacjaThis article presents a modified sinusoidal pulse-width modulation (SPWM) scheme for a five-phase, three-level neutral-point-clamped inverter. The modulation scheme deploys a modified min–max function to inject the zero-sequence components into the reference modulating signals; hence enabling the effective utilization of the DC-link voltage. Balanced split-input DC-link voltages were achieved through further incorporation of adjustable...
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Integrated Three-Level Dual-Phase Inverter
PublikacjaIn view of reducing the number of inverter legs that provide dual-phase, three-level output voltages (as may be needed in an uninterruptible power supply), and that also provide a wide range of output frequencies (as needed in an advanced motor drive system with wide speed ranges), a three-level, dual-phase inverter topology is presented in this paper. Its three-level attribute was based on the F-type inverter topological concept,...
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A Five-Leg Three-Level Dual-Output Inverter
PublikacjaClassical 3-level dual-output inverter, 3-L DOI, involves two similar 3-level inverters that provides a pair of 3-phase output voltages with same or different frequencies from common input voltage source. Flexibility of either operation of the constituting inverters is evident in this DOI; but total duplication of power switches is a major drawback. State of the art coupled 3-L DOIs reduce this drawback by providing series-shared...
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Three-Level Z-Source Neutral-Point-Clamped Inverter
PublikacjaThe paper describes construction and the principles of activity, attributes and potential of 3-phase Z-type inverters. The paper focuses on the basic system and suggested 3-level system of a NPC type Z-inverter, which was elaborated by authors. Simplified theoretical analysis of both systems has been verified by detailed simulation research. In the last section of the article, the possibility to build multilevel Z- inverters based...
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Design of three-phase three-level CIC T-source inverter with maximum boost control
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Hybridized Space-Vector Pulsewidth Modulation for Multiphase Two-Level Voltage Source Inverter
PublikacjaIn space vector pulsewidth modulation (SVPWM) algorithms for multiphase two-level voltage source inverters (VSI), the components of active vectors in all orthogonal spaces have to be calculated within the processor and stored in its memory. These necessitate intensive computational efforts of the processor and large memory space. This article presents a hybridized SVPWM for multiphase two-level VSI. In this algorithm, elements...
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Single-phase, Five-level Inverter with SPWM-Based Neutral Point Voltage Balancing Scheme
PublikacjaMultilevel inverter topologies provide several advantages over two-level inverter configuration. These benefits are the reason for the growing interest in multilevel topologies among research society. One of the most popular topological concepts (diode and active switch clamping) requires neutral-point potential balancing due to series-connected capacitor banks across the input dc link in such derived inverter configurations. This...
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space-vector pulse width modulation for three-level npc converter with the neutral point voltage control
PublikacjaPrzedstawiono strategię modulacji PWM dla trójpoziomowych falowników NPC z predykcją i kompensacją asymetrii rozkładu napięcia na kondensatorach obwodu pośredniczącego
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The extended model predictive-sliding mode control of three-level AC/DC power converters with output voltage and load resistance variations
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Multipulse inverter structures with low voltage distortion
PublikacjaA novel approach to the voltage source inverters (VSI) construction is presented in the paper. The invented inverter structures allow to operate several DC/AC converters in parallel resulting in lower voltage distortions at extremely low switching frequency. The research presented in the paper describes such a parallel operation of the VSI’s which is possible thanks to the use of coupled inductors. The eighteen-pulse three-level...
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Hybridized PWM Strategy for Three- and Multiphase Three-Level NPC Inverters
PublikacjaA simple hybridized pulsewidth modulation (PWM) algorithm for three- and multiphase three-level neutral point clamped (NPC) inverters is proposed. The proposed solution is based on classical space vector PWM (SVPWM) algorithms for two-level inverters but can also be based on sinusoidal PWM with min–max injection. An additional level of output voltage is obtained by modifying the resulting switching patterns taking into account...
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Multilevel inverter neutral-point voltage sensor diagnostic based on the Extended Kalman Filter
PublikacjaA new algorithm for neutral point voltage imbalance estimation in DC link of the three-level (3L) neutral point clamped (NPC) voltage source inverter (VSI) is proposed. Application of the proposed algorithm does not require any additional sensors. The unbalanced voltage calculation is based on the information derived from the inverter output measured currents and from the knowledge of the load model parameters. In order to estimate...
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Piotr Chrzan prof. dr hab. inż.
OsobyUrodził się w 1954 r. w Sopocie. Jest absolwentem Wydziału Elektroniki Politechniki Gdańskiej (1978). W 1980 r. podjął pracę na Wydziale Elektrycznym w zespole prof. Jerzego Jaczewskiego. W 1988 r. uzyskał stopień naukowy doktora nauk technicznych, habilitację w 1999 r., w zakresie elektrotechniki: energoelektroniki i automatyki napędu, a tytuł profesora w 2017 r. Był promotorem 6 obronionych prac doktorskich (w tym 3 z wyróżnieniem)....
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Space Vector Pulsewidth Modulation Strategy for Multilevel Cascaded H-Bridge Inverter With DC-Link Voltage Balancing Ability
PublikacjaSpace vector pulsewidth modulation (SVPWM) algorithms for cascaded H-bridge multilevel (CHB ML) inverter usually provide the possibility of using several combinations of active voltage vectors to generate the same output voltage vector. For preselected H-bridges, some of them may generate output voltages opposite to the assumed direction. This results in the change of the dc-link voltages of these H-bridges in the opposite direction...
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SiC-based T-type modules for multi-pulse inverter with coupled inductors
PublikacjaThe paper presents SiC-based three-level T-type modules designed for a high-performance 30kVA DC/AC inverter operating at high frequency 85 kHz with low THD of the output voltage. This inverter system consists of two integrated parts. The first part is active and contains three parallelconnected three-phase T-type modules built with fast-switching SiC power transistors. The second, passive part of the system is a set of inductors...
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Structure and the space vector modulation for a medium-voltage power-electronic-transformer based on two seven-level cascade H-bridge inverters
PublikacjaThis study presents the structure and the space vector pulse-width modulation (SVPWM) for power electronic transformer (PET) based on two seven-level cascade H-bridge (CHB) inverters. The DC links of CHB inverters are coupled with nine dual-active bridge (DAB) converters with medium-frequency transformers. The DC-link voltages are equalised with two methods – through the control of DAB voltages...
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Modular multipulse voltage source inverters with integrating coupled reactors
PublikacjaA novel approach to the voltage source inverters (VSI) construction is presented in the paper. The invented inverter structures allow to operate several DC/AC converters in parallel resulting in lower voltage distortions at extremely low switching frequency. The research presented in the paper describes such a parallel operation of the VSI’s which is possible thanks to the use of coupled inductors. The eighteen-pulse and twenty-four-pulse...
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Dead-Time Effect Compensation Based on Additional Phase Current Measurements
PublikacjaThis paper proposes a new method of dead-time effect compensation. The proposed solution is based on additional phase current measurements realized by analog-to-digital converters. These measurements are carried out at the time instants specified by a pulsewidth-modulation (PWM) strategy. This makes it possible to estimate inverter currents at the commutation instants and, finally, to estimate the voltage error caused by dead time. This...
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Space vector modulation in multilevel inverters of the servo drives of the trajectory measurements telescopes
PublikacjaUsing the MatLab/Simulink mathematical model of a three-phase three-level voltage inverter, the influence of the space-vector modulation (SVM) algorithm on the pulsations of the current (torque) of an AC motor in the range of low rotation speeds is considered. It is shown that the SVM of the second kind does not provide a pulsations level comparable to the pulsations of a sinusoidal pulse-width modulation (SPWM), both in the static...