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Search results for: CMOS CIRCUITS
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Reducing average and peak temperatures of VLSI CMOS circuits by means of evolutionary algorithm applied to high level synthesis.
PublicationW pracy przedstawiono adaptacyjny algorytm ewolucyjny zastosowany do syntezy wysokiego poziomu układów cyfrowych CMOS w celu zredukowania pobieranej przez nie mocy. Prowadzi to do redukcji szczytowej i średniej temperatury układu scalonego. Dzięki temu uzyskuje się wzrost niezawodności projektowanych układów scalonych.
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Bogdan Pankiewicz dr hab. inż.
PeopleBogdan Pankiewicz graduated in 1993 from the Department of Electronics at Gdansk University of Technology (GUT) and in 2002 he obtained a doctoral degree in the field of electronics at the Faculty of Electronics, Telecommunications and Informatics at GUT. From the beginning of his career he is associated with GUT: first as an assistant (years 1994-2002) and then as assistant professor (since 2002) at the Faculty of Electronics,...
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Characteristics of an image sensor with early-vision processing fabricated in standard 0.35 µm CMOS technology
PublicationThe article presents measurement results of prototype integrated circuits for acquisition and processing of images in real time. In order to verify a new concept of circuit solutions of analogue image processors, experimental integrated circuits were fabricated. The integrated circuits, designed in a standard 0.35 µm CMOS technology, contain the image sensor and analogue processors that perform low-level convolution-based image...
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Ladder-Based Synthesis and Design of Low-Frequency Buffer-Based CMOS Filters
PublicationBuffer-based CMOS filters are maximally simplified circuits containing as few transistors as possible. Their applications, among others, include nano to micro watt biomedical sensors that process physiological signals of frequencies from 0.01 Hz to about 3 kHz. The order of a buffer-based filter is not greater than two. Hence, to obtain higher-order filters, a cascade of second-order filters is constructed. In this paper, a more...
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Analogue CMOS ASICs in Image Processing Systems
PublicationIn this paper a survey of analog application specific integrated circuits (ASICs) for low-level image processing, called vision chips, is presented. Due to the specific requirements, the vision chips are designed using different architectures best suited to their functions. The main types of the vision chip architectures and their properties are presented and characterized on selected examples of prototype integrated circuits (ICs)...
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CMOS implementation of an analogue median filter for image processing in real time
PublicationAn analogue median filter, realised in a 0.35 μm CMOS technology, is presented in this paper. The key advantages of the filter are: high speed of image processing (50 frames per second), low-power operation (below 1.25 mW under 3.3 V supply) and relatively high accuracy of signal processing. The presented filter is a part of an integrated circuit for image processing (a vision chip), containing: a photo-sensor matrix, a set of...
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Highly linear CMOS triode transconductor for VHF applications
PublicationA high-speed, fully balanced complementary-symmetry metal-oxide-semiconductor (CMOS) triode transconductor is presented. The proposed approach exploits a pseudo-differential-pair triode configuration with a simple adaptive circuit stabilising the drain-to-source voltages of metal-oxide-semiconductor (MOS) transistors. Since no additional active circuits (apart from the resistors made of the cut-off MOS devices) and no feedback...
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Marek Wójcikowski dr hab. inż.
PeopleMarek Wójcikowski graduated in 1993 from the Department of Electronics at Gdansk University of Technology (GUT). In 2002 he obtained a doctoral degree in the field of electronics and in 2016 he obtained a habilitation at the Faculty of Electronics, Telecommunications and Informatics at GUT. From the beginning of his career he is associated with GUT: first as an assistant (years 1994-2002) and then as assistant professor (since...
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Low-Power Receivers for Wireless Capacitive Coupling Transmission in 3-D-Integrated Massively Parallel CMOS Imager
PublicationThe paper presents pixel receivers for massively parallel transmission of video signal between capacitive coupled integrated circuits (ICs). The receivers meet the key requirements for massively parallel transmission, namely low-power consumption below a single μW, small area of less than 205 μm2, high sensitivity better than 160 mV, and good immunity to crosstalk. The receivers were implemented and measured in a 3-D IC (two face-to-face...
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Programmable Input Mode Instrumentation Amplifier Using Multiple Output Current Conveyors
PublicationIn this paper a programmable input mode instrumentation amplifier (IA) utilising second generation, multiple output current conveyors and transmission gates is presented. Its main advantage is the ability to choose a voltage or current mode of inputs by setting the voltage of two configuration nodes. The presented IA is prepared as an integrated circuit block to be used alone or as a sub-block in a microcontroller or in a field...
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Large dynamic range high frequency fully differential CMOS transconductanceamplifier.
PublicationW pracy zaproponowano nową koncepcję układową w pełni różnicowego wzmacniacza transkonduktancyjnego CMOS o dużym zakresie dynamiki i szerokim pasmie częstotliwości. Przeprowadzone badania teoretyczne i symulacyjne potwierdziły małe zniekształcenia harmoniczne (THD), szerokie pasmo przenoszonych częstotliwości oraz duży zakres dynamiki dla sygnałów różnicowych.
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An Ultra-Low-Energy Analog Comparator for A/D Converters in CMOS Image Sensors
PublicationThis paper proposes a new solution of an ultra-low-energy analog comparator, dedicated to slope analog-to-digital converters (ADC), particularly suited for CMOS image sensors (CISs) featuring a large number of ADCs. For massively parallel imaging arrays, this number may be as high as tens-hundreds of thousands ADCs. As each ADC includes an analog comparator, the number of these comparators in CIS is always high. Detailed analysis...
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Design of highly linear tunable CMOS OTA for continuous-time filters
PublicationW pracy przedstawiono analityczną metodę projektowania wzmacniaczy transkon-duktancyjnych CMOS o bardzo dobrej liniowości. Zaproponowano dwie wersje układu różniące się umiejscowieniem dodatkowej pary różnicowej służącej do kompensacji nieliniowości charakterystyki przejściowej. Praca zawiera wyniki symulacji pełnych wersji obu układów otrzymane przy użyciu symulatora SPICE.
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A field programmable analog array for CMOS continuous-time OTA-C filter applications
PublicationW artykule opisano programowalny wzmacniacz transkonduktancyjny oraz konfigurowalny blok analogowy CAB składający się ze wzmacniacza transkonduktancyjnego, kluczy oraz programowalnego kondensatora. Z bloków CAB można zbudować uniwersalne, programowalne filtry. Wzmacniacz transkondukancyjny został przesymulowany oraz wykonany w technologii CMOS. Wyniki pomiarów pokazują, że transkonduktancja wzmacniacza może być przestrajana ponad...
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An Analog Sub-Miliwatt CMOS Image Sensor With Pixel-Level Convolution Processing
PublicationA new approach to an analog ultra-low power medium-resolution vision chip design is presented. The prototype chip performs low-level image processing algorithms in real time. Only a photo-diode, MOS switches and two capacitors are used to create an analog processing element (APE) that is able to realize any convolution algorithm based on a full 3x3 kernel. The proof-of-concept circuit is implemented in 0.35 µm CMOS technology,...
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Light-Powered Starter for Micro-Power Boost DC–DC Converter for CMOS Image Sensors
PublicationThe design of a starter for a low-voltage, micro-power boost DC–DC converter intended for powering CMOS image sensors is presented. A unique feature of the starter is extremely low current, below 1 nA, supplying its control circuit. Therefore, a high-voltage (1.3 V) configuration of series-connected photovoltaic diodes available in a standard CMOS process or a small external LED working in photovoltaic mode can be used as an auxiliary...
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Single-Slope ADC With Embedded Convolution Filter for Global-Shutter CMOS Image Sensors
PublicationThis brief presents an analog-to-digital converter (ADC) suitable for acquisition and processing of images in the global-shutter mode at the pixel level. The ADC consists of an analog comparator, a multi-directional shift register for the comparator states, and a 16-bit reversible binary counter with programmable step size. It works in the traditional single-slope mode. The novelty is that during each step of the reference ramp,...
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A nine-input 1.25 mW, 34 ns CMOS analog median filter for image processing in real time
PublicationIn this paper an analog voltage-mode median filter, which operates on a 3 × 3 kernel is presented. The filter is implemented in a 0.35 μm CMOS technology. The proposed solution is based on voltage comparators and a bubble sort configuration. As a result, a fast (34 ns) time response with low power consumption (1.25 mW for 3.3 V) is achieved. The key advantage of the configuration is relatively high accuracy of signal processing,...
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A CMOS Pixel With Embedded ADC, Digital CDS and Gain Correction Capability for Massively Parallel Imaging Array
PublicationIn the paper, a CMOS pixel has been proposed for imaging arrays with massively parallel image acquisition and simultaneous compensation of dark signal nonuniformity (DSNU) as well as photoresponse nonuniformity (PRNU). In our solution the pixel contains all necessary functional blocks: a photosensor and an analog-to-digital converter (ADC) with built-in correlated double sampling (CDS) integrated together. It is implemented in...
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Output-capacitorless low-dropout regulator using a cascoded flipped voltage follower
PublicationPrzedstawiono udoskonaloną konfigurację wtórnika napięciowego w odwróconej konfiguracji oraz jej zastosowanie w regulatorze o małym spadku napięcia. W pracy przedstawiono teoretyczną analizę podstawowych parametrów wtórnika oraz regulatora napięcia. Ponadto przedstawiono wyniki pomiarów parametrów prototypowego układu scalonego wykonanego z użyciem technologii CMOS 0.35 um. Uzyskane wyniki porównano z rezultatami uzyskanymi w innych...
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Automatic tuning of a resonant circuit in wireless power supply systems for biomedical sensors
PublicationIn this paper, a tuning method of a resonant circuit suited for wireless powering of miniature endoscopic capsules is presented and discussed. The method allows for an automatic tuning of the resonant frequency and matching impedance of a full wave rectifier loading the resonant circuit. Thereby, the receiver tunes so as to obtain the highest power efficiency under given conditions of transmission. A prototype receiver for wireless...