Single-Phase Dual Ground 7L Inverter Topology with Reduced Component Count and Stress

Atif Iqbal; Jagabar Sathik M; Gopinath Np; Jarosław Guziński

doi:10.1109/sefet61574.2024.10718031

Single-Phase Dual Ground 7L Inverter Topology with Reduced Component Count and Stress

Abstrakt

In this article, an improved single-phase dual-ground transformerless inverter topology is proposed. The proposed inverter topology is able to generate a 7L output voltage waveform with a boosting factor of 1.5. The increased voltage gain of the proposed topology does not result in increased voltage stress on the components. The proposed structure requires 8 IGBTs, one diode, and three switched capacitors (SCs) with self-voltage balancing. To further reduce leakage current, the proposed topology employs a dual ground configuration between the source's negative terminal and the grid's neutral. A comparison with recent seven-level inverter topologies is included to emphasize the proposed topology's benefits. After confirming the viability of the proposed topology through simulation using the Simulink platform, an experimental validation using 1 kW is carried out using a prototype setup, and the results are measured.

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Autorzy (4)

Atif Iqbal dr hab. inż.
- Qatar University, Katar
Jagabar Sathik M
- St. Joseph’s Institue of Science and Technology, Chennai, Indie
Gopinath Np
- St. Joseph’s Institue of Science and Technology, Chennai, Indie
Jarosław Guziński prof. dr hab. inż.