Filtry
wszystkich: 14
Wyniki wyszukiwania dla: CACHE MECHANISM
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A Fail-Safe NVRAM Based Mechanism for Efficient Creation and Recovery of Data Copies in Parallel MPI Applications
PublikacjaThe paper presents a fail-safe NVRAM based mechanism for creation and recovery of data copies during parallel MPI application runtime. Specifically, we target a cluster environment in which each node has an NVRAM installed in it. Our previously developed extension to the MPI I/O API can take advantage of NVRAM regions in order to provide an NVRAM based cache like mechanism to significantly speed up I/O operations and allow to preload...
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Cache service for maps presentation in distributed information data exchange system
PublikacjaThe paper presents the proposition of caches implementation for map presentation in distributed information data exchange system. The concept of cache service is described in the context of distributed information data exchange system elements which control and present on maps positions and other identification data of vessels and other suspicious objects on the territorial sea, sea-coast and the internal sea-waters. The proposed...
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Taking advantage of the shared explicit cache system based critical sections in the shared memory parallel architectures
PublikacjaArtykuł prezentuje nową metodę implementacji sekcji krytycznych w równoległych architekturach z pamięcią współdzieloną, takich jak systemy zintegrowane wielowątkowe wieloprocesorowe. Metoda stanowi modyfikację i rozbudowanie metody zwanej Folding, dostępnej w procesorach sieciowych oraz jest w założeniach podobna do techniki zwanej cache-based locking. W porównaniu do dostępnych metod, nowa metoda usuwa problemy skalowalności i...
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Distributed NVRAM Cache – Optimization and Evaluation with Power of Adjacency Matrix
PublikacjaIn this paper we build on our previously proposed MPI I/O NVRAM distributed cache for high performance computing. In each cluster node it incorporates NVRAMs which are used as an intermediate cache layer between an application and a file for fast read/write operations supported through wrappers of MPI I/O functions. In this paper we propose optimizations of the solution including handling of write requests with a synchronous mode,...
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Three levels of fail-safe mode in MPI I/O NVRAM distributed cache
PublikacjaThe paper presents architecture and design of three versions for fail-safe data storage in a distributed cache using NVRAM in cluster nodes. In the first one, cache consistency is assured through additional buffering write requests. The second one is based on additional write log managers running on different nodes. The third one benefits from synchronization with a Parallel File System (PFS) for saving data into a new file which...
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A Parallel MPI I/O Solution Supported by Byte-addressable Non-volatile RAM Distributed Cache
PublikacjaWhile many scientific, large-scale applications are data-intensive, fast and efficient I/O operations have become of key importance for HPC environments. We propose an MPI I/O extension based on in-system distributed cache with data located in Non-volatile Random Access Memory (NVRAM) available in each cluster node. The presented architecture makes effective use of NVRAM properties such as persistence and byte-level access behind...
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Integrating SHECS-based critical sections with hardware SMP scheduler in TLP-CMPs
PublikacjaArtykuł prezentuje koncepcje zintegrowania sekcji krytycznych opartych o układ SHECS (współdzielony jawny cache system) ze sprzętowym menadżerem zadań SMP w zintegrowanych architekturach wieloprocesorowych z wielowątkowością sprzętową (TLP-CMPs). Przedstawione jest porównanie wydajności zintegrowania sekcji krytycznych SHECS z programowym menadżerem zadań SMP względem użycia sprzętowego menadżera zadań SMP. Środowiskiem wykonania...
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Performance Analysis of Convolutional Neural Networks on Embedded Systems
PublikacjaMachine learning is no longer confined to cloud and high-end server systems and has been successfully deployed on devices that are part of Internet of Things. This paper presents the analysis of performance of convolutional neural networks deployed on an ARM microcontroller. Inference time is measured for different core frequencies, with and without DSP instructions and disabled access to cache. Networks use both real-valued and...
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Improving Clairvoyant: reduction algorithm resilient to imbalanced process arrival patterns
PublikacjaThe Clairvoyant algorithm proposed in “A novel MPI reduction algorithm resilient to imbalances in process arrival times” was analyzed, commented and improved. The comments concern handling certain edge cases in the original pseudocode and description, i.e., adding another state of a process, improved cache friendliness more precise complexity estimations and some other issues improving the robustness of the algorithm implementation....
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A Solution to Image Processing with Parallel MPI I/O and Distributed NVRAM Cache
PublikacjaThe paper presents a new approach to parallel image processing using byte addressable, non-volatile memory (NVRAM). We show that our custom built MPI I/O implementation of selected functions that use a distributed cache that incorporates NVRAMs located in cluster nodes can be used for efficient processing of large images. We demonstrate performance benefits of such a solution compared to a traditional implementation without NVRAM...
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Performance assessment of OpenMP constructs and benchmarks using modern compilers and multi-core CPUs
PublikacjaConsidering ongoing developments of both modern CPUs, especially in the context of increasing numbers of cores, cache memory and architectures as well as compilers there is a constant need for benchmarking representative and frequently run workloads. The key metric is speed-up as the computational power of modern CPUs stems mainly from using multiple cores. In this paper, we show and discuss results from running codes such as:...
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A highly-efficient technique for evaluating bond-orientational order parameters
PublikacjaWe propose a novel, highly-efficient approach for the evaluation of bond-orientational order parameters (BOPs). Our approach exploits the properties of spherical harmonics and Wigner 3jj-symbols to reduce the number of terms in the expressions for BOPs, and employs simultaneous interpolation of normalised associated Legendre polynomials and trigonometric functions to dramatically reduce the total number of arithmetic operations....
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Multi-agent large-scale parallel crowd simulation
PublikacjaThis paper presents design, implementation and performance results of a new modular, parallel, agent-based and large scale crowd simulation environment. A parallel application, implemented with C and MPI, was implemented and run in this parallel environment for simulation and visualization of an evacuation scenario at Gdansk University of Technology, Poland and further in the area of districts of Gdansk. The application uses a...
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DATABASE AND BIGDATA PROCESSING SYSTEM FOR ANALYSIS OF AIS MESSAGES IN THE NETBALTIC RESEARCH PROJECT
PublikacjaA specialized database and a software tool for graphical and numerical presentation of maritime measurement results has been designed and implemented as part of the research conducted under the netBaltic project (Internet over the Baltic Sea – the implementation of a multi-system, self-organizing broadband communications network over the sea for enhancing navigation safety through the development of e-navigation services.) The...