- Program finansujący:
- Narodowe Centrum Nauki (NCN) (National Science Centre)
- UMO-2016/23/B/ST7/03733 z dnia 2017-07-14
- Okres realizacji:
- 2017-07-14 - 2022-07-13
- Kierownik projektu:
- prof. dr hab. inż. Stanisław Szczepański
- Realizowany w:
- Katedra Systemów Mikroelektronicznych
- Wartość projektu:
- 791 700.00 PLN
- Typ zgłoszenia:
- Krajowy Program Badawczy
- Projekt krajowy
- Politechnika Gdańska
Publikacje powiązane z tym projektem
The paper presents an operational transconductance amplifier (OTA) with low transconductance (0.62–6.28 nS) and low power consumption (28–270 nW) for the low-frequency analog front-ends in biomedical sensor interfaces. The proposed OTA implements an innovative, highly linear voltage-to-current converter based on the channel-length-modulation effect, which can be rail-to-rail driven. At 1-V supply and 1-Vpp asymmetrical input driving,...
In this brief, a power-efficient digital technique for gain and offset correction in slope analog-to-digital converters (ADCs) has been proposed. The technique is especially useful for imaging arrays with massively parallel image acquisition where simultaneous compensation of dark signal non-uniformity (DSNU) as well as photo-response non-uniformity (PRNU) is critical. The presented approach is based on stopping the ADC clock by...
In the paper, a digital clock stopping technique for gain and offset correction in time-mode analog-to-digital converters (ADCs) has been proposed. The technique is dedicated to imagers with massively parallel image acquisition working in the time mode where compensation of dark signal non-uniformity (DSNU) as well as photo-response non-uniformity (PRNU) is critical. Fixed pattern noise (FPN) reduction has been experimentally validated...
Hybrid‐mode single‐slope ADC with improved linearity and reduced conversion time for CMOS image sensorsPublikacja
In the paper, a single‐slope analog‐to‐digital converter (ADC) for integrated CMOS image sensor applications with an improved technique of conversion has been proposed. The proposed hybrid‐mode ADC automatically uses one of the following conversion techniques: time based (i.e. PWM) or voltage based (i.e. single‐slope). During the ADC operation, the clock frequency and reference voltage are modified in order to reduce the conversion...
In this paper, a gray-scale CMOS image sensor (CIS) characterization system with an optimization feature has been proposed. By using a very fast and precise control of light intensity, based on the pulsewidth-modulation method, it is avoided to measure the illuminance every time. These features accelerate the multicriteria CIS optimization requiring many thousands of measurements. The system throughput is 2.5 Gb/s, which allows...
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