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Wyniki wyszukiwania dla: SYSTEM ON CHIP
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COMPARISON OF SYSTEM ON CHIP TECHNOLOGIES FOR SPACE APPLICATIONS
PublikacjaThe paper presents a review of technologies available for the implementation of digital and mixed signal systems, particularly the system on a chip (SoC) for space applications. The phenomena encountered in the space environment are briefly presented, together with the known solutions, regarding the design of complex electronic systems. The most important norms regarding single die integrated circuits designed for space are also...
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Hardware cryptography coprocessor for system on chip soft processor
PublikacjaW artykule przedstawiono realizację sprzętową i programową szyfrującejo i deszyfrującego algorytmu AES.Obydwie implementacje zostały zralizowane z wykorzystaniem układu Virtex II i przetestowane. Jako kryterium porónawcze wybrano zużycie zasobów układu oraz wydajność. Realizacja sprzętowa wykonuje operację szyfrowania 2 dekady szybcie niż wersja programowa, ale wymaga pięciokrotnie więcej zasobówIn this paper hardware and software...
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High-Speed Serial Embedded Deterministic Test for System-on-Chip Designs
PublikacjaThe paper presents a high-speed serial interface between external tester and Embedded Deterministic Test (EDT) compression logic hosted by SoC designs. With only a single bidirectional link, the system is capable of feeding distributed heterogeneous cores with hundreds of test channels. Moreover, it synergistically supports EDT bandwidth management to improve the overall test performance. A detailed study indicates a high potential...
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Optimization of chip removing system operation in circular sawing machine
PublikacjaThe paper presents the optimization of the wood chips removing system in the sliding table saw. Chips are generated during the cutting of the material. The attention was focused on the upper casing of mentioned system. The methodical experimental studies of the pressure distribution inside the casing during the wood chip removing operation for the selected rotational speed of saw blade with a diameter of 300 mm and 450 mm were...
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Experimental analysis of chip removing system in circular sawing machine
PublikacjaPaper presents analysis of the process of removing the wood chips generated during the cutting of the material on the circular sawing machine. The attention is focused on the upper cover of the chip removing system. Within the framework of the work a systematic experimental study of pressure distribution in the cover during operation of the selected rotational speed of saw blade with a diameter of 300 mm and 450 mm was carried...
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Experimental examination and modification of chip suction system in circular sawing machine
PublikacjaThe article presents the results of experimental examination of the wood chip suction system in the existing sliding table saw before and after its modifi cation. The studies focused on the extraction hood of the mentioned system. The methodical experimental research of the pressure distribution inside the hood during wood chip removal for the selected rotational speed of saw blades of 3500 and 6000 min-1 with a diameter of 300...
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Miernik elementów RLC na bazie układu ''programmable system On a Chip''
PublikacjaW artykule zaprezentowano miernik parametrów impedancyjnych oparty na układzie typu ''programmable system On a Chip'' firmy Cypress. Zawiera on w sobie mikroprocesor oraz reprogramowalne bloki analogowe i cyfrowe. Do budowy modelu wykorzystano układ CY8C26443, w którym zaimplementowano metodę pomiaru opartą na dyskretnym przekształceniu Fouriera pozwalającą, na podstawie zebranych próbek napięcia i prądu, wyznaczyć składowe Re...
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Wirtualny analizator stanów logicznych na bazie układu typu "System on a Chip"
PublikacjaW dobie dominacji układów cyfrowych, jednym z ważniejszych narzędzi uruchomieniowych jest analizator stanów logicznych (ASL). Komercyjne przyrządy nie są tanie, choć ich możliwości diagnostyczne uzasadniają cenę. W artykule przedstawiono ASL w konwencji przyrządu wirtualnego połączonego z PC poprzez interfejs USB, co obniża koszt urządzenia bez znaczącego pogorszenia jego możliwości. Wykorzystano układ typu SoC "System on a Chip"...
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Application in circular sawing machines of the experimental results of investigations of the chip removing system operation
PublikacjaThe experimental results of the chip removing system operation are presented. The main aim of them was to optimize suction system of the panel saw Fx3 and its follower Fx550. The attention was focused on the upper casing, which was the part of removing system. Within the framework of the work a systematic experimental study of pressure distribution in the casing during operation of the selected rotational speed of saw blade with...
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Numerical analysis of chip removing system operation in circular sawing machine using CFD software
PublikacjaPaper presents the analysis of the results of numerical simulations of the air flow process of wood chips removing system in the circular sawing machine. The attention is focused on the upper cover and bottom shelter of the chip removing system. Within the framework of the work a systematic numerical modeling of the air flow distribution in the cover and shelter during operation of the selected rotational speed of saw blade with...
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Chip suction system in circular sawing machine: empirical research and computational fluid dynamics numerical simulations
PublikacjaThe experimental analysis of the wood chip removing system during its redesigning in the existing sliding table circular saw and computational fluid dynamic (CFD) numerical simulations of the air flow process is presented in the paper. The attention was focused on the extraction hood and the bottom shelter of the actual existing system. The main aim was to perform experimental research on the pressure distribution inside the...
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The contactless method of chip-to-chip high-speed data transmission monitoring
PublikacjaThis paper presents a technique of decoupling differential signals transmitted in a pair of microstrip lines on a printed circuit board (PCB), using dedicated coupler for high speed data transmission monitoring in chip-to-chip interconnections. The coupler used for signal probing is overlayed on the pair of microstrip lines under test, and provides a signal to the next blocks of the measurement system without disturbing transmission...
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Network on Chip implementation using FPGAs resources
PublikacjaW artykule przedstawiono implementację sieci typu ''Network on Chip'' w układach FPGA. Sieci typu ''Network on Chip'' stały się bardzo interesującym i obiecującym rozwiązaniem dla systemów typu ''System on Chip'' które charakteryzują się intensywną komunikacją wewnętrzną. Ze względu na inne paradygmaty projektowania nie ma obecnie dostępnych efektywnych platform do budowy prototypów sieci typu ''Network on Chip'' i ich weryfikacji....
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Bogdan Pankiewicz dr hab. inż.
OsobyBogdan Pankiewicz ukończył w 1993 r. Wydział Elektroniki Politechniki Gdańskiej, specjalność układy elektroniczne a w 2002 r. uzyskał stopień doktora w dziedzinie elektroniki na Wydziale ETI, PG. Od początku kariery jest związany z Politechniką Gdańską: najpierw jako asystent (lata 1994–2002), a następnie jako adiunkt (od 2002 r.) na Wydziale Elektroniki, Telekomunikacji i Informatyki. Zajmuje się projektowaniem analogowych i cyfrowych...
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A Comprehensive Survey on Antennas On-Chip Based on Metamaterial, Metasurface, and Substrate Integrated Waveguide Principles for Millimeter-Waves and Terahertz Integrated Circuits and Systems
PublikacjaAntennas on-chip are a particular type of radiating elements valued for their small footprint. They are most commonly integrated in circuit boards to electromagnetically interface free space, which is necessary for wireless communications. Antennas on-chip radiate and receive electromagnetic (EM) energy as any conventional antennas, but what distinguishes them is their miniaturized size. This means they can be integrated inside...
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Circular saws with closed chip grooves
PublikacjaW pracy przedstawiono analizę wpływu kształtu rowków wiórowych ostrzy piły tarczowej na sposób odprowadzania wiórów ze strefy skrawania. Zaprezentowano rozwiązanie konstrukcyjne piły tarczowej z domkniętymi rowkami wiórowymi
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Chip geometry while sawing frozen wood.
PublikacjaW pracy przedstawiono analizę geometrii wiórów zebranych podczas przecierania pryzm sosnowych o temperaturach -5 st. C, -20 st. C, + 18 st. C na pilarce ramowej przecieranych za pomocą cienkich pił. Analizowano rozkład wiórów w funkcji ich wymiarów podłużnych oraz pola powierzchni. W badaniach wykorzystywano kamere cyfrową, a obrazy z niej uzyskane obrabiano za pomoca oprogramowania opracowanego w srodowisku LabView. W widmach...
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Gene-based identification of bacterial colonies with an electric chip
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Ellipse-fitting algorithm implementation in the impedance measurement system based on DAQ card with FPGA
PublikacjaThe paper presents an implementation of the ellipse-fitting algorithm in the impedance measurement system based on DAQ card equipped with FPGA chip. The method implementation was tested by simulation means as well as experimentally in the designed and presented measurement system. Finally, the limit values of sampling parameters which assures satisfying accuracy were given.
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Divination from chips: monitoring of the sawing process with chip geometry analyzes
PublikacjaWióry (trociny) są niechcianym produktem towarzyszącym procesowi przecinania. Jednakże, niosą one w sobie wiele informacji świadczących o przebiegu procesu obróbki. Metoda oceny składu procentowego wiórów - ich frakcji - jest prosta lecz ma szereg ważnych ograniczeń. W pracy zaprezentowano nowy alternatywny sposób pomiaru geometrii wiórów. Przedstawiono wyniki dla skrawania drewna mrożonego i nie mrożonego. Wyniki uzyskane ta metodą...
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The influence of the cooling conditions on the cutting tool wear and the chip formation mechanism
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[Chapter III] Influence of chip transport method on effects of cutting with circular saw
PublikacjaW pracy przedstawiono analizę transportu wiórów ze strefy skrawania na zewnątrz materiału obrabianego w procesie przecinania drewna piłami tarczowymi. Przedstawiono również przykłady zużycia pił tarczowych spowodowanych niewłaściwym transportem wiórów.
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Interface circuit for impedance sensors using two specialized single-chip microsystems
PublikacjaW artykule przedstawiono obwód interfejsu przeznaczony do pomiaru parametrów impedancyjnych czujników lub celek pomiarowych instalowanych na obiektach technicznych. Umożliwia on pomiar modułu i argumentu impedancji w zakresie 10ohm
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Selected aspects of system design theory.
PublikacjaPrzedstawiono wybrane fragmenty z teorii i techniki projektowania złożonych systemów technicznych. Zwrócono szczególną uwagę na tworzenie schematów strukturalnych i funkcjonalnych systemów, a także występujących tam relacji między elementami takiego systemu. Opisano kolejne kroki postępowania dla doboru cech elementów systemu wg macierzy ich przewidywanych właściwości oraz przykłady podziału dla istniejących składników systemów...
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Sample processing for DNA chip array-based analysis of enterohemorrhagic Escherichia coli (EHEC)
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Affymetrix Chip Definition Files Construction Based on Custom Probe Set Annotation Database
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Prediction of cutting forces during micro end milling considering chip thickness accumulation
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Expedite EM-driven generation of Pareto-optimal trade-off curves for variable-turn on-chip inductors
PublikacjaThis work presents a novel approach to computationally efficient Pareto front identification for variable-turn on-chip inductors. The final outcome is a set of solutions that correspond to the best trade-offs between conflicting design objectives. Here, we consider minimising inductor area and, simultaneously, maximising its quality factor, while maintaining a specified inductance value at a given operating frequency. As opposed...
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Analysis of positioning error and its impact on high frequency properties of differential signal coupler
PublikacjaThis paper presents the analysis of the effect of differential signal coupler positioning accuracy on its high frequency performance parameters for contact-less high speed chip-to-chip data transmission on PCB application. Our considerations are continuation of the previous works on differential signal coupler concept, design methodology and analysis for high speed data transmission monitoring. The theoretical analysis of possible...
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Analysis of Positioning Error and Its Impact on High Frequency Performance Parameters of Differential Signal Coupler of Differential Signal Coupler
PublikacjaThis paper presents the analysis of the effect of differential signal coupler positioning accuracy on its high frequency performance parameters for contact-less high speed chip-to-chip data transmission on PCB application. Our considerations are continuation of the previous works on differential signal coupler concept, design methodology and analysis for high speed data transmission monitoring presented in [1, 2]. The theoretical...
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Critical factors for the performance of chip array-based electrical detection of DNA for analysis of pathogenic bacteria
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Design of Intelligent Low-Voltage Load Switch for Remote Control System in Smart Grid
PublikacjaCurrent low-voltage load switches do not support remote disconnect/connect and real-time monitoring of a disconnect/connect state. Addressing to these issues, this paper presents a low-voltage load switch for a smart remote control system, which uses a one-chip microcontroller board and a DC step motor drive mechanism and provides the feedback on the switch status also. Arrears disconnect and full-pay connect control is implemented...
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Innovative method of localization airplanes in VCS (VCS-MLAT) distributed system
PublikacjaThe article presents the concept and the structure of the localization module. The prototype module is the part of the VCS (VCS-MLAT) localization distributed system. The device receives the audio signal transmitted in airplanes band (118 MHz – 136 MHz). Received data with the timestamps are send to the main server. The data from multiple devices estimates the localization of the airplane. The main aim of the project is the analysis...
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Efficient Surrogate Modeling and Design Optimization of Compact Integrated On-Chip Inductors Based on Multi-Fidelity EM Simulation Models
PublikacjaHigh-performance and small-size on-chip inductors play a critical role in contemporary radio-frequency integrated circuits. This work presents a reliable surrogate modeling technique combining low-fidelity EM simulation models, response surface approximations based on kriging interpolation, and space mapping technology. The reported method is useful for the development of broadband and highly accurate data-driven models of integrated...
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Implementation of Coprocessor for Integer Multiple Precision Arithmetic on Zynq Ultrascale+ MPSoC
PublikacjaRecently, we have opened the source code of coprocessor for multiple-precision arithmetic (MPA). In this contribution, the implementation and benchmarking results for this MPA coprocessor are presented on modern Zynq Ultrascale+ multiprocessor system on chip, which combines field-programmable gate array with quad-core ARM Cortex-A53 64-bit central processing unit (CPU). In our benchmark, a single coprocessor can be up to 4.5 times...
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Fifth-order low-pass CMOS OTA-C continuous-time filter with on-chip automatic tuning
PublikacjaW pracy przedstawiono budowę operacyjnego wzmacniacza transkonduktancyjnego (OTA) zasilanego napięciem stałym 2.8-4.5V wykonanego w technologii CMOS0.8um n-well. Wzmacniacz ten wykorzystano do budowy dolnoprzepustowego filtru czasu ciągłego typu OTA-C piątego rzędu. W układzie scalonym umieszczono także blok automatycznego dostrajania częstotliwości odcięcia filtru. Przedstawiono wyniki symulacji komputerowych (modele MOS BSIM3v3)...
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Rapid multi-objective design of integrated on-chip inductors by means of Pareto front exploration and design extrapolation
PublikacjaIdentification of the best trade-offs between conflicting design objectives allows for making educated design decisions as well as assessing suitability of a given component or circuit for a specific application. In case of inductors, the typical objectives include maximization of the quality factor and minimization of the layout area, as well as maintaining a required inductance at a given operating frequency. This work demonstrates...
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ASIC Design Example of Complex SoC with FPGA Prototyping
PublikacjaThe paper presents an example of the System on a Chip design, where the FPGA prototyping has been used. Two FPGA prototypes have been realized. The first FPGA prototype uses AVNET board containing Xilinx Virtex4 device accompanied by custom board with required devices. The second FPGA prototype has been built using the custom PCB with Xilinx Virtex-4 XC4VLX60 FPGA accompanied by all needed external components. The final system...
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Estimation of Minimum Uncut Chip Thickness during Precision and Micro-Machining Processes of Various Materials—A Critical Review
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Microfluidic Method of Pig Oocyte Quality Assessment in relation to Different Follicular Size Based on Lab-on-Chip Technology
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Nanoconjugates of graphene oxide derivatives and meso-tetraphenylporphyrin: a new avenue for anticancer photodynamic therapies – Cell-on-a-Chip analysis
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The study on minimum uncut chip thickness and cutting forces during laser-assisted turning of WC/NiCr clad layers
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ASIC Design Example of Complex SoC with FPGA Prototyping
PublikacjaThe paper presents an example of the System on a Chip design, where the FPGA prototyping has been used. Two FPGA prototypes have been realized. The first FPGA prototype uses AVNET board containing Xilinx Virtex4 device accompanied by custom board with required devices. The second FPGA prototype has been built using the custom PCB with Xilinx Virtex-4 XC4VLX60 FPGA accompanied by all needed external components. The final system...
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High gain/bandwidth off‑chip antenna loaded with metamaterial unit‑cell impedance matching circuit for sub‑terahertz near‑field electronic systems
PublikacjaAn innovative off-chip antenna (OCA) is presented that exhibits high gain and efficiency performance at the terahertz (THz) band and has a wide operational bandwidth. The proposed OCA is implemented on stacked silicon layers and consists of an open circuit meandering line. It is shown that by loading the antenna with an array of subwavelength circular dielectric slots and terminating it with a metamaterial unit cell, its impedance...
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Molecular Strategy for Survival at a Critical High Temperature in Eschierichia coli
PublikacjaThe molecular mechanism supporting survival at a critical high temperature (CHT) in Escherichia coli was investigated. Genome-wide screening with a single-gene knockout library provided a list of genes indispensable for growth at 47°C, called thermotolerant genes. Genes for which expression was affected by exposure to CHT were identified by DNA chip analysis. Unexpectedly, the former contents did not overlap with the latter except...
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Using A Particular Sampling Method for Impedance Measurement
PublikacjaThe paper presents an impedance measurement method using a particular sampling method which is an alternative to DFT calculation. The method uses a sine excitation signal and sampling response signals proportional to current flowing through and voltage across the measured impedance. The object impedance is calculated without using Fourier transform. The method was first evaluated in MATLAB by means of simulation. The method was...
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Miniaturized impedance analyzer using AD5933
PublikacjaThe paper presents the analyzer allowing to measure impedance in a range of 10 ohms <|Zx|<10 Gohms in a wide frequency range from 10 mHz up to 100 kHz. The device specific features are: miniaturization, low power consumptions and the use of impedance measurement method based on DSP. These features were possible thanks to the use of newest generation of large scale integration chips: e.g. „system on a chip” microsystems (AD5933)...
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Miniaturized impedance analyzer using AD5933
PublikacjaThe paper presents the analyzer allowing to measure impedance in a range of 10 ohms <|Zx|<10 Gohms in a wide frequency range from 10 mHz up to 100 kHz. The device specific features are: miniaturization, low power consumptions and the use of impedance measurement method based on DSP. These features were possible thanks to the use of newest generation of large scale integration chips: e.g. „system on a chip” microsystems (AD5933)...
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[Komentarz do artykułu] Yin, W.-Y., Wu, B., Miao, M., Doi, L.B., Li, L.-W., and Kooi, P.-S.: Experimental characterisation and modelling of on-chip capacitors and resistors on GaAs substrates.
PublikacjaDokonano krytycznej oceny wartości elementów schematu zastępczego rezystorów monolitycznych wykonanych na podłożu GaAs przedstawionych w pracy: Yin, W.-Y., Wu, B., Miao, M., Doi, L.B., Li, L.-W., and Kooi, P.-S.: Experimental characterisation and modelling of on-chip capacitors and resistors on GaAs substrates, IEE Proc. Microw. Antennas and Propag., 2002,149, (1), pp.50-52.
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PULSE and ECG measurement from the hand with single fingers - elbows resting on the armrests of the chair - Man 29 age
Dane BadawczeThe data set presents the measurements of the pulse and the ECG signal from the hand made with the use of a proprietary measuring system based on the AD8232 chip, a set of green diode and a phototransistor made on the STM32 microcontroller. Thanks to such a constructed device, it is possible to measure the ECG signal in a non-standard way - from the...