Wyniki wyszukiwania dla: CMOS ANALOG INTEGRATED CIRCUIT
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Hybrid‐mode single‐slope ADC with improved linearity and reduced conversion time for CMOS image sensors
PublikacjaIn the paper, a single‐slope analog‐to‐digital converter (ADC) for integrated CMOS image sensor applications with an improved technique of conversion has been proposed. The proposed hybrid‐mode ADC automatically uses one of the following conversion techniques: time based (i.e. PWM) or voltage based (i.e. single‐slope). During the ADC operation, the clock frequency and reference voltage are modified in order to reduce the conversion...
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An Ultra-Low-Energy Analog Comparator for A/D Converters in CMOS Image Sensors
PublikacjaThis paper proposes a new solution of an ultra-low-energy analog comparator, dedicated to slope analog-to-digital converters (ADC), particularly suited for CMOS image sensors (CISs) featuring a large number of ADCs. For massively parallel imaging arrays, this number may be as high as tens-hundreds of thousands ADCs. As each ADC includes an analog comparator, the number of these comparators in CIS is always high. Detailed analysis...
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An Analog Sub-Miliwatt CMOS Image Sensor With Pixel-Level Convolution Processing
PublikacjaA new approach to an analog ultra-low power medium-resolution vision chip design is presented. The prototype chip performs low-level image processing algorithms in real time. Only a photo-diode, MOS switches and two capacitors are used to create an analog processing element (APE) that is able to realize any convolution algorithm based on a full 3x3 kernel. The proof-of-concept circuit is implemented in 0.35 µm CMOS technology,...
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In-ADC, Rank-Order Filter for Digital Pixel Sensors
PublikacjaThis paper presents a new implementation of the rank-order filter, which is established on a parallel-operated array of single-slope (SS) analog-to-digital converters (ADCs). The SS ADCs use an “on-the-ramp processing” technique, i.e., filtration is performed along with analog-to-digital conversion, so the final states of the converters represent a filtered image. A proof-of-concept 64 × 64 array of SS ADCs, integrated with MOS...
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Characteristics of an image sensor with early-vision processing fabricated in standard 0.35 µm CMOS technology
PublikacjaThe article presents measurement results of prototype integrated circuits for acquisition and processing of images in real time. In order to verify a new concept of circuit solutions of analogue image processors, experimental integrated circuits were fabricated. The integrated circuits, designed in a standard 0.35 µm CMOS technology, contain the image sensor and analogue processors that perform low-level convolution-based image...
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CMOS implementation of an analogue median filter for image processing in real time
PublikacjaAn analogue median filter, realised in a 0.35 μm CMOS technology, is presented in this paper. The key advantages of the filter are: high speed of image processing (50 frames per second), low-power operation (below 1.25 mW under 3.3 V supply) and relatively high accuracy of signal processing. The presented filter is a part of an integrated circuit for image processing (a vision chip), containing: a photo-sensor matrix, a set of...
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Analogue CMOS ASICs in Image Processing Systems
PublikacjaIn this paper a survey of analog application specific integrated circuits (ASICs) for low-level image processing, called vision chips, is presented. Due to the specific requirements, the vision chips are designed using different architectures best suited to their functions. The main types of the vision chip architectures and their properties are presented and characterized on selected examples of prototype integrated circuits (ICs)...
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Fault detection in electronic circuits using test buses
PublikacjaA survey of test buses designed for diagnostics of digital and analog electronic circuits is presented: the IEEE 1149.1 bus for digital circuits, the IEEE 1149.4 bus for mixed-signal and the IEEE 1149.6 bus for AC coupled complex digital circuits. Each bus is presented with its structure, solution of key elements, particularly boundary registers and a set of test instructions. Diagnosis with the use of the described buses is...
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A current-controlled FET
PublikacjaA novel semiconductor device, viz., Horizontally-Split-Drain Current-Controlled Field-Effect Transistor (HSDCCFET) with two control electrodes is proposed in this works. For the sake of brevity, the device can be called a CCFET. Operating principle of the proposed transistor is based on one of the galvanomagnetic phenomena, the Biot-Savart-Laplace law and a Gradual Channel Detachment Effect (GCDE). The transistor is dedicated...
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A CMOS Pixel With Embedded ADC, Digital CDS and Gain Correction Capability for Massively Parallel Imaging Array
PublikacjaIn the paper, a CMOS pixel has been proposed for imaging arrays with massively parallel image acquisition and simultaneous compensation of dark signal nonuniformity (DSNU) as well as photoresponse nonuniformity (PRNU). In our solution the pixel contains all necessary functional blocks: a photosensor and an analog-to-digital converter (ADC) with built-in correlated double sampling (CDS) integrated together. It is implemented in...
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A 1-nS 1-V Sub-1-µW Linear CMOS OTA with Rail-to-Rail Input for Hz-Band Sensory Interfaces
PublikacjaThe paper presents an operational transconductance amplifier (OTA) with low transconductance (0.62–6.28 nS) and low power consumption (28–270 nW) for the low-frequency analog front-ends in biomedical sensor interfaces. The proposed OTA implements an innovative, highly linear voltage-to-current converter based on the channel-length-modulation effect, which can be rail-to-rail driven. At 1-V supply and 1-Vpp asymmetrical input driving,...
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Rapid multi-objective design of integrated on-chip inductors by means of Pareto front exploration and design extrapolation
PublikacjaIdentification of the best trade-offs between conflicting design objectives allows for making educated design decisions as well as assessing suitability of a given component or circuit for a specific application. In case of inductors, the typical objectives include maximization of the quality factor and minimization of the layout area, as well as maintaining a required inductance at a given operating frequency. This work demonstrates...
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Programmable Input Mode Instrumentation Amplifier Using Multiple Output Current Conveyors
PublikacjaIn this paper a programmable input mode instrumentation amplifier (IA) utilising second generation, multiple output current conveyors and transmission gates is presented. Its main advantage is the ability to choose a voltage or current mode of inputs by setting the voltage of two configuration nodes. The presented IA is prepared as an integrated circuit block to be used alone or as a sub-block in a microcontroller or in a field...
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Piotr Płotka dr hab. inż.
OsobyPiotr Płotka otrzymał tytuł zawodowy magistra inżyniera w 1976 r., a stopień doktora w dyscyplinie elektronika w 1985 r. – nadane przez Wydział Elektroniki Telekomunikacji i Informatyki Politechniki Gdańskiej. W 2008 r. otrzymał stopień doktora habilitowanego, także w dyscyplinie elektronika, nadany przez Instytut Technologii Elektronowej w Warszawie. Od 1977 r. pracował w Akademii Techniczno-Rolniczej w Bydgoszczy, a od 1981...
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On analog comparators for CMOS digital pixel applications. A comparative study
PublikacjaVoltage comparator is the only – apart from the light-to-voltage converter – analog component in the digital CMOS pixel. In this work, the influence of the analog comparator nonidealities on the performance of the digital pixel has been investigated. In particular, two versions of the digital pixel have been designed in 0.35 μm CMOS technology, each using a different type of analog comparator. The properties of both versions have...
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A nine-input 1.25 mW, 34 ns CMOS analog median filter for image processing in real time
PublikacjaIn this paper an analog voltage-mode median filter, which operates on a 3 × 3 kernel is presented. The filter is implemented in a 0.35 μm CMOS technology. The proposed solution is based on voltage comparators and a bubble sort configuration. As a result, a fast (34 ns) time response with low power consumption (1.25 mW for 3.3 V) is achieved. The key advantage of the configuration is relatively high accuracy of signal processing,...
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Innovative method of localization airplanes in VCS (VCS-MLAT) distributed system
PublikacjaThe article presents the concept and the structure of the localization module. The prototype module is the part of the VCS (VCS-MLAT) localization distributed system. The device receives the audio signal transmitted in airplanes band (118 MHz – 136 MHz). Received data with the timestamps are send to the main server. The data from multiple devices estimates the localization of the airplane. The main aim of the project is the analysis...
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Analog CMOS processor for early vision processing with highly reduced power consumption
PublikacjaA new approach to an analog ultra-low power visionchip design is presented. The prototype chip performs low-levelconvolutional image processing algorithms in real time. Thecircuit is implemented in 0.35 μm CMOS technology, contains64 x 64 SIMD matrix with embedded analogue processors APE(Analogue Processing Element). The photo-sensitive-matrix is of2.2 μm x 2.2 μm size, giving the density of 877 processors permm2. The matrix dissipates...
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The surface of a fragment of the structure of an integrated circuit in the semi-contact mode.
Dane BadawczeThe surface of a fragment of the structure of an integrated circuit. Topographic measurements in the semi-contact mode. NTEGRA Prima (NT-MDT) device. NSG 01 probe.
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Certified Integrated Circuit Design Lab - obtaining the certificate and the benefits of having it
PublikacjaThis paper describes the process of establishing and maintaining a certified integrated circuit design lab. The advantages of having a certification for the lab are presented, and also how to obtain the certificate based on the example of Cadence Certified Lab at Gdansk University of Technology, Poland. Various integrated circuits designed at the lab are also briefly shown.