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Search results for: ANALOG CMOS CIRCUITS
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High-performance analog circuits : bipolar noise
PublicationOmówiono typowe źródła szumów występujące w tranzystorach bipolarnych, a mianowicie: cieplne, śrutowe, generacyjno-rekombinacyjne, 1/f, 1/f2, wybuchowe (RTS),lawinowe. Przedstawiono szumowy schemat zastępczy tranzystora bipolarnego oraz opisano wydajności poszczególnych źródeł szumów. Przytoczono informacje o zastępczej rezystancji tranzystora szumów oraz współczynniku szumów.
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Design of a 3.3V four-quadrant analog CMOS multiplier
PublicationW pracy przedstawiono dwa czterokwadrantowe mnożniki analogowe CMOS pracujące przy napięciu zasilania 3.3V. Układy wykorzystują tranzystory MOS pracujące zarówno w zakresie nasycenia jak i w zakresie triodowym. Wyniki symulacji komputerowych pokazują, że współczynnik zawartości harmonicznych (THD) sygnału wyjściowego jest mniejszy niż 0.75% dla sygnału wejściowego o amplitudzie 1V o częstotliwości 10MHz. Pasmo 3dB układu wynosi...
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Fault diagnosis of analog piecewise linear circuits based on homotopy
PublicationArtykuł opisuje weryfikację metodą diagnostyki analogowych układów odcinkowo-liniowych opartą na podejściu homotopijnym. Homotopia przekształca jedną funkcję f(x) w inną funkcję g(x) poprzez zmianę parametru homotopii tî[0,1]. Ścieżka homotopijna pokazuje drogę od punktu x0 z dziedziny funkcji f(x) do odpowiadającego mu punktu x* funkcji g(x). Idea metody zakłada wykorzystanie funkcji f(x) do opisu diagnozowanego układu w stanie...
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Test limitations induced by fault-driven instability of analog circuits.
PublicationCelem pracy jest ocena ograniczeń testowania uszkodzeń parametrycznych wynikajacych z utraty stabilności przez testowany układ analogowy. Zastosowano metody zapożyczone z teorii sterowania: liniową transformacje frakcyjną i analizę metodą strukturalnych wartości szczególnych. Przykładowej analizie poddano filtr typu leapfrog. Do obliczeń wykorzystano środowisko Matlab/Simulink. Wyniki obliczeń wykazały dużą podatność testowanego...
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On analog comparators for CMOS digital pixel applications. A comparative study
PublicationVoltage comparator is the only – apart from the light-to-voltage converter – analog component in the digital CMOS pixel. In this work, the influence of the analog comparator nonidealities on the performance of the digital pixel has been investigated. In particular, two versions of the digital pixel have been designed in 0.35 μm CMOS technology, each using a different type of analog comparator. The properties of both versions have...
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A self-testing method of large analog circuits in electronic embedded systems
PublicationPrzedstawiono metodę samotestowania filtrów wyższych rzędów składających się z łańcucha pierwszego lub drugiego rzędu filtrów (bloków) zaimplementowanych w mieszanych sygnałowo elektronicznych systemach wbudowanych sterowanych mikrokontrolerami lub procesorami sygnałowymi.Idea metody bazuje na fakcie, iż odpowiedź danego bloku jest traktowana jako sygnał pobudzenia kolejnego bloku. Dzięki temu rozwiązaniu rekonfigurowalny układ...
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A versatile analog CMOS cell: voltage - buffer /current - conveyor/ multiplier
PublicationW pracy przedstawiono koncepcję uniwersalnej komórki analogowej przeznaczonej dla programowalnych układów analogowych (FPAA). Komórka może pełnić funkcję bufora napięciowego, konwjora prądowego lub mnożnika analogowego. Układ przesymulowano w technologii CMOS 2 ćm.
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An Ultra-Low-Energy Analog Comparator for A/D Converters in CMOS Image Sensors
PublicationThis paper proposes a new solution of an ultra-low-energy analog comparator, dedicated to slope analog-to-digital converters (ADC), particularly suited for CMOS image sensors (CISs) featuring a large number of ADCs. For massively parallel imaging arrays, this number may be as high as tens-hundreds of thousands ADCs. As each ADC includes an analog comparator, the number of these comparators in CIS is always high. Detailed analysis...
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An Analog Sub-Miliwatt CMOS Image Sensor With Pixel-Level Convolution Processing
PublicationA new approach to an analog ultra-low power medium-resolution vision chip design is presented. The prototype chip performs low-level image processing algorithms in real time. Only a photo-diode, MOS switches and two capacitors are used to create an analog processing element (APE) that is able to realize any convolution algorithm based on a full 3x3 kernel. The proof-of-concept circuit is implemented in 0.35 µm CMOS technology,...
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Implementation of an input-output method of diagnosis of analog electronic circuits in embedded systems
PublicationPrzedstawiono implementację zmodyfikowanej metody 2D detekcji i lokalizacji uszkodzeń sieci analogowych z uwzględnieniem tolerancji elementów nieuszkodzonych w systemach wbudowanych bazujących na mikrokontrolerach. Metoda składa się z dwóch etapów: przedtestowego - tworzenie słownika uszkodzeń i testowego, w którym dokonywany jest pomiar przez mikrokontroler amplitudy i przesunięcia fazowego odpowiedzi na pobudzenie przebiegiem...
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Analog CMOS processor for early vision processing with highly reduced power consumption
PublicationA new approach to an analog ultra-low power visionchip design is presented. The prototype chip performs low-levelconvolutional image processing algorithms in real time. Thecircuit is implemented in 0.35 μm CMOS technology, contains64 x 64 SIMD matrix with embedded analogue processors APE(Analogue Processing Element). The photo-sensitive-matrix is of2.2 μm x 2.2 μm size, giving the density of 877 processors permm2. The matrix dissipates...
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A field programmable analog array for CMOS continuous-time OTA-C filter applications
PublicationW artykule opisano programowalny wzmacniacz transkonduktancyjny oraz konfigurowalny blok analogowy CAB składający się ze wzmacniacza transkonduktancyjnego, kluczy oraz programowalnego kondensatora. Z bloków CAB można zbudować uniwersalne, programowalne filtry. Wzmacniacz transkondukancyjny został przesymulowany oraz wykonany w technologii CMOS. Wyniki pomiarów pokazują, że transkonduktancja wzmacniacza może być przestrajana ponad...
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Two‐functional μBIST for Testing and Self‐Diagnosis of Analog Circuits in Electronic Embedded Systems
PublicationThe paper concerns the testing of analog circuits and blocks in mixed‐signal Electronic Embedded Systems (EESs), using the Built‐in Self‐Test (BIST) technique. An integrated, two‐functional, embedded microtester (μBIST) based on reuse of signal blocks already present in an EES, such as microprocessors, memories, ADCs, DACs, is presented. The novelty of the μBIST solution is its extended functionality. It can perform 2 testing functions:...
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A method of self-testing of analog circuits based on fully differential op-amps with theTCBF classifier
PublicationA new approach of self-testing of analog circuits based on fully differential op-amps of mixed-signal systems controlled by microcontrollers is presented. It consists of a measurement procedure and a fault diagnosis procedure. We measure voltage samples of a time response of a tested circuit on a stimulation of a unit step function given at the common-mode reference voltage input of the op-amp. The fault detection and fault localization...
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Two-center radial basis function network for classification of soft faults in electronic analog circuits
PublicationW pracy zaproponowano specjalizowaną sieć neuronową z dwucentrowymi radialnymi funkcjami bazowymi (TCRB) neuronów w warstwie ukrytej,przeznaczoną do diagnostyki uszkodzeń parametrycznych układów analogowych. Zastosowanie funkcji TCRB pozwala na znaczne zmniejszenie liczby neuronów w warstwie ukrytej, lepsze dopasowanie do słownika uszkodzeń oraz poprawę dokładności klasyfikacji, w porównaniu z dotychczas stosowaną siecią z jednocentrowymi...
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New Two-center Ellipsoidal Basis Function Neural Network for Fault Diagnosis of Analog Electronic Circuits
PublicationIn the paper a new fault diagnosis-oriented neural network and a diagnostic method for localization of parametric faults in Analog Electronic Circuits (AECs) with tolerances is presented. The method belongs to the class of dictionary Simulation Before Test (SBT) methods. It utilizes dictionary fault signatures as a family of identification curves dispersed around nominal positions by component tolerances of the Circuit Under Test...
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A nine-input 1.25 mW, 34 ns CMOS analog median filter for image processing in real time
PublicationIn this paper an analog voltage-mode median filter, which operates on a 3 × 3 kernel is presented. The filter is implemented in a 0.35 μm CMOS technology. The proposed solution is based on voltage comparators and a bubble sort configuration. As a result, a fast (34 ns) time response with low power consumption (1.25 mW for 3.3 V) is achieved. The key advantage of the configuration is relatively high accuracy of signal processing,...
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Reducing average and peak temperatures of VLSI CMOS circuits by means of evolutionary algorithm applied to high level synthesis.
PublicationW pracy przedstawiono adaptacyjny algorytm ewolucyjny zastosowany do syntezy wysokiego poziomu układów cyfrowych CMOS w celu zredukowania pobieranej przez nie mocy. Prowadzi to do redukcji szczytowej i średniej temperatury układu scalonego. Dzięki temu uzyskuje się wzrost niezawodności projektowanych układów scalonych.
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
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IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
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Large dynamic range high frequency fully differential CMOS transconductanceamplifier.
PublicationW pracy zaproponowano nową koncepcję układową w pełni różnicowego wzmacniacza transkonduktancyjnego CMOS o dużym zakresie dynamiki i szerokim pasmie częstotliwości. Przeprowadzone badania teoretyczne i symulacyjne potwierdziły małe zniekształcenia harmoniczne (THD), szerokie pasmo przenoszonych częstotliwości oraz duży zakres dynamiki dla sygnałów różnicowych.
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Design of highly linear tunable CMOS OTA for continuous-time filters
PublicationW pracy przedstawiono analityczną metodę projektowania wzmacniaczy transkon-duktancyjnych CMOS o bardzo dobrej liniowości. Zaproponowano dwie wersje układu różniące się umiejscowieniem dodatkowej pary różnicowej służącej do kompensacji nieliniowości charakterystyki przejściowej. Praca zawiera wyniki symulacji pełnych wersji obu układów otrzymane przy użyciu symulatora SPICE.
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Analogue CMOS ASICs in Image Processing Systems
PublicationIn this paper a survey of analog application specific integrated circuits (ASICs) for low-level image processing, called vision chips, is presented. Due to the specific requirements, the vision chips are designed using different architectures best suited to their functions. The main types of the vision chip architectures and their properties are presented and characterized on selected examples of prototype integrated circuits (ICs)...
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Single-Slope ADC With Embedded Convolution Filter for Global-Shutter CMOS Image Sensors
PublicationThis brief presents an analog-to-digital converter (ADC) suitable for acquisition and processing of images in the global-shutter mode at the pixel level. The ADC consists of an analog comparator, a multi-directional shift register for the comparator states, and a 16-bit reversible binary counter with programmable step size. It works in the traditional single-slope mode. The novelty is that during each step of the reference ramp,...
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A CMOS Pixel With Embedded ADC, Digital CDS and Gain Correction Capability for Massively Parallel Imaging Array
PublicationIn the paper, a CMOS pixel has been proposed for imaging arrays with massively parallel image acquisition and simultaneous compensation of dark signal nonuniformity (DSNU) as well as photoresponse nonuniformity (PRNU). In our solution the pixel contains all necessary functional blocks: a photosensor and an analog-to-digital converter (ADC) with built-in correlated double sampling (CDS) integrated together. It is implemented in...
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Zbigniew Czaja dr hab. inż.
PeopleZbigniew Czaja was born in Czluchow, Poland, in 1970. He graduated from Gdansk University of Technology, Faculty of Electronics, Telecommunications and Informatics in 1995. The Ph.D. degree in electronics was received in 2001 from the same university. He worked as assistant professor at this university from 2002 to 2013. In 2014, he qualified as an associate professor, and in 2017, as a professor. His research interests are in...
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Bogdan Pankiewicz dr hab. inż.
PeopleBogdan Pankiewicz graduated in 1993 from the Department of Electronics at Gdansk University of Technology (GUT) and in 2002 he obtained a doctoral degree in the field of electronics at the Faculty of Electronics, Telecommunications and Informatics at GUT. From the beginning of his career he is associated with GUT: first as an assistant (years 1994-2002) and then as assistant professor (since 2002) at the Faculty of Electronics,...
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Fault detection in electronic circuits using test buses
PublicationA survey of test buses designed for diagnostics of digital and analog electronic circuits is presented: the IEEE 1149.1 bus for digital circuits, the IEEE 1149.4 bus for mixed-signal and the IEEE 1149.6 bus for AC coupled complex digital circuits. Each bus is presented with its structure, solution of key elements, particularly boundary registers and a set of test instructions. Diagnosis with the use of the described buses is...
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A testing method of analog parts of mixed-signal electronic systems equipped with the IEEE1149.1 test bus
PublicationA new solution of the JTAG BIST for testing analog circuits in mixed-signal electronic microsystems controlled by microcontrollers and equipped with the IEEE1149.1 bus is presented. It is based on a new fault diagnosis method in which an analog circuit is stimulated by a buffered signal from the TMS line, and the time response of the circuit to this signal is sampled by the ADC equipped with the JTAG. The method can be used for...
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Michał Kowalewski dr inż.
PeopleResearch career: Doctoral dissertation "Tolerance robust, dictionary methods of fault diagnosis of electronic circuits with specialized neural classifier". Participation as a performer in four KBN research teams MNiSW and NCBiR concerning the development of diagnostic methods for analog electronic circuits and diagnostics of technical objects using impedance spectroscopy methods. 39 publications, including 10 in magazines,...
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Using an IEEE1149.1 Test Bus for Fault Diagnosis of Analog Parts of Electronic Embedded Systems
PublicationThe new solution of a BIST called the JTAG BIST for self-testing of analog parts of electronic embedded systems is presented in the paper. The JTAG BIST consists of the BCT8244A and SCANSTA476 integrated circuits of Texas Instruments controlled via the IEEE 1149.1 bus. The BCT8244A is a scan test device with octal buffers, and the SCANSTA476 is a 12-bit ADC with 8 analog input channels. Self-testing approach is based on the fault...
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Characteristics of an image sensor with early-vision processing fabricated in standard 0.35 µm CMOS technology
PublicationThe article presents measurement results of prototype integrated circuits for acquisition and processing of images in real time. In order to verify a new concept of circuit solutions of analogue image processors, experimental integrated circuits were fabricated. The integrated circuits, designed in a standard 0.35 µm CMOS technology, contain the image sensor and analogue processors that perform low-level convolution-based image...
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Ladder-Based Synthesis and Design of Low-Frequency Buffer-Based CMOS Filters
PublicationBuffer-based CMOS filters are maximally simplified circuits containing as few transistors as possible. Their applications, among others, include nano to micro watt biomedical sensors that process physiological signals of frequencies from 0.01 Hz to about 3 kHz. The order of a buffer-based filter is not greater than two. Hence, to obtain higher-order filters, a cascade of second-order filters is constructed. In this paper, a more...
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Highly linear CMOS triode transconductor for VHF applications
PublicationA high-speed, fully balanced complementary-symmetry metal-oxide-semiconductor (CMOS) triode transconductor is presented. The proposed approach exploits a pseudo-differential-pair triode configuration with a simple adaptive circuit stabilising the drain-to-source voltages of metal-oxide-semiconductor (MOS) transistors. Since no additional active circuits (apart from the resistors made of the cut-off MOS devices) and no feedback...
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Marek Wójcikowski dr hab. inż.
PeopleMarek Wójcikowski graduated in 1993 from the Department of Electronics at Gdansk University of Technology (GUT). In 2002 he obtained a doctoral degree in the field of electronics and in 2016 he obtained a habilitation at the Faculty of Electronics, Telecommunications and Informatics at GUT. From the beginning of his career he is associated with GUT: first as an assistant (years 1994-2002) and then as assistant professor (since...
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CMOS implementation of an analogue median filter for image processing in real time
PublicationAn analogue median filter, realised in a 0.35 μm CMOS technology, is presented in this paper. The key advantages of the filter are: high speed of image processing (50 frames per second), low-power operation (below 1.25 mW under 3.3 V supply) and relatively high accuracy of signal processing. The presented filter is a part of an integrated circuit for image processing (a vision chip), containing: a photo-sensor matrix, a set of...
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Hybrid‐mode single‐slope ADC with improved linearity and reduced conversion time for CMOS image sensors
PublicationIn the paper, a single‐slope analog‐to‐digital converter (ADC) for integrated CMOS image sensor applications with an improved technique of conversion has been proposed. The proposed hybrid‐mode ADC automatically uses one of the following conversion techniques: time based (i.e. PWM) or voltage based (i.e. single‐slope). During the ADC operation, the clock frequency and reference voltage are modified in order to reduce the conversion...
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Fixed Pattern Noise Reduction and Linearity Improvement in Time-Mode CMOS Image Sensors
PublicationIn the paper, a digital clock stopping technique for gain and offset correction in time-mode analog-to-digital converters (ADCs) has been proposed. The technique is dedicated to imagers with massively parallel image acquisition working in the time mode where compensation of dark signal non-uniformity (DSNU) as well as photo-response non-uniformity (PRNU) is critical. Fixed pattern noise (FPN) reduction has been experimentally validated...
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A 1-nS 1-V Sub-1-µW Linear CMOS OTA with Rail-to-Rail Input for Hz-Band Sensory Interfaces
PublicationThe paper presents an operational transconductance amplifier (OTA) with low transconductance (0.62–6.28 nS) and low power consumption (28–270 nW) for the low-frequency analog front-ends in biomedical sensor interfaces. The proposed OTA implements an innovative, highly linear voltage-to-current converter based on the channel-length-modulation effect, which can be rail-to-rail driven. At 1-V supply and 1-Vpp asymmetrical input driving,...
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In-ADC, Rank-Order Filter for Digital Pixel Sensors
PublicationThis paper presents a new implementation of the rank-order filter, which is established on a parallel-operated array of single-slope (SS) analog-to-digital converters (ADCs). The SS ADCs use an “on-the-ramp processing” technique, i.e., filtration is performed along with analog-to-digital conversion, so the final states of the converters represent a filtered image. A proof-of-concept 64 × 64 array of SS ADCs, integrated with MOS...
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Diagnostyka analogowych filtrów wielosekcyjnych oparta na klasyfikato-rach neuronowych z dwucentrowymi funkcjami bazowymi
PublicationPrzedmiotem artykułu jest zastosowanie klasyfikatora z dwucentrowymi funkcjami bazowymi do lokalizacji uszkodzeń w wielosekcyjnych torach analogowych elektronicznych systemów wbudowanych sterowanych mikrokontrolerem. Przedstawiono szczegóły procedury pomiarowej oraz metody detekcji i lokalizacji uszkodzeń toru analogowego z wykorzysta-niem klasyfikatora DB zaimplementowanego w postaci algorytmicznej w kodzie programu mikrokontrolera....
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Multi-Channel Virtual Instrument for Measuring Temperature—A Case Study
PublicationThe article presents the hardware and software configuration of the developed multi-channel temperature measurement system as well as calibration procedures and measurement results verifying the properties of measurement channels. The system has been developed and dedicated primarily for measuring the temperature distribution in a laboratory model simulating underground power lines. With the adopted configuration of the analog...
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Low-Power Receivers for Wireless Capacitive Coupling Transmission in 3-D-Integrated Massively Parallel CMOS Imager
PublicationThe paper presents pixel receivers for massively parallel transmission of video signal between capacitive coupled integrated circuits (ICs). The receivers meet the key requirements for massively parallel transmission, namely low-power consumption below a single μW, small area of less than 205 μm2, high sensitivity better than 160 mV, and good immunity to crosstalk. The receivers were implemented and measured in a 3-D IC (two face-to-face...
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Dedicated power supply subsystem for ultra-low noise preamplifiers
PublicationIn field of electronics there is need for low-noise amplifiers. Noise have the most important influence on analog circuits. Therefore exist necessity to develop new ultra-low noise power supplies, which can cooperate with specified amplifiers and preamplifiers. It is very common that professional power supplies are very expensive and still have disadvantages. This paper proposes simple and inexpensive solution, which fulfill specific...
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A solution of the integrated µBIST for functional and diagnostic testing in mixed-signal electronic embedded systems
PublicationMain problem of the paper is testing of analog circuits and blocks in mixed-signal electronic embedded systems (EESs), using the built-in self-test (BIST) technique. The integrated mBIST based on reusing signal blocks already present in an EES, such as processors, memories, ADCs, is presented. The novelty of the solution is the extended functionality of the mBIST. It can perform 2 testing functions: functional testing and fault...
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Zaawansowane Metody Pomiarowe i Diagnostyczne 2022/2023
e-Learning Courses{mlang en} 1. Introduction/Guide for the use of the International System of Units2. Rules and style conventions for expressing values of quantities.3. The role of measurement uncertainty in conformity assessment. 4. Probabilistic model for measurement processes, estimation theory5. Analog-digital conversion methods6. Selected structures of classical analog-digital converters7. New techniques of analog-digital conversion: sigma-delta...
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Zaawansowane Metody Pomiarowe i Diagnostyczne 2023/2024
e-Learning Courses{mlang en} 1. Introduction/Guide for the use of the International System of Units2. Rules and style conventions for expressing values of quantities.3. The role of measurement uncertainty in conformity assessment. 4. Probabilistic model for measurement processes, estimation theory5. Analog-digital conversion methods6. Selected structures of classical analog-digital converters7. New techniques of analog-digital conversion: sigma-delta...
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A current-controlled FET
PublicationA novel semiconductor device, viz., Horizontally-Split-Drain Current-Controlled Field-Effect Transistor (HSDCCFET) with two control electrodes is proposed in this works. For the sake of brevity, the device can be called a CCFET. Operating principle of the proposed transistor is based on one of the galvanomagnetic phenomena, the Biot-Savart-Laplace law and a Gradual Channel Detachment Effect (GCDE). The transistor is dedicated...
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Programmable Input Mode Instrumentation Amplifier Using Multiple Output Current Conveyors
PublicationIn this paper a programmable input mode instrumentation amplifier (IA) utilising second generation, multiple output current conveyors and transmission gates is presented. Its main advantage is the ability to choose a voltage or current mode of inputs by setting the voltage of two configuration nodes. The presented IA is prepared as an integrated circuit block to be used alone or as a sub-block in a microcontroller or in a field...
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Piotr Płotka dr hab. inż.
PeoplePiotr Płotka received the M.Sc. and D.Eng. degrees in electronic engineering from the Gdansk University of Technology, Poland, in 1976 and 1985. In 2008 he received D.Sc. (Dr.Hab.) degree, also in electronic engineering, from the Institute of Electron Technology at Warsaw, Poland. From 1977 he was with Academy of Technology and Agriculture at Bydgoszcz, Poland and from 1981 with the Gdansk University of Technology. In cooperation...