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Search results for: analog processor array
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Analog filter design system for field programmable analog array.
PublicationObiektowy system do automatycznego projektowania filtrów kaskadowych i symetrycznych filtrów FLF z wykorzystaniem wzmacniaczy transkonuktancyjnych OTACi bloków bikwadratowych z optymalizacją zakresu dynamiki, zniekształceń i wrażliwości. System umożliwia realizację standardowych aproksymacji charakterystyk amplitudowych oraz dowolnie zdefiniowanych przez użytkownika.
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Analog CMOS processor for early vision processing with highly reduced power consumption
PublicationA new approach to an analog ultra-low power visionchip design is presented. The prototype chip performs low-levelconvolutional image processing algorithms in real time. Thecircuit is implemented in 0.35 μm CMOS technology, contains64 x 64 SIMD matrix with embedded analogue processors APE(Analogue Processing Element). The photo-sensitive-matrix is of2.2 μm x 2.2 μm size, giving the density of 877 processors permm2. The matrix dissipates...
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A field programmable analog array for CMOS continuous-time OTA-C filter applications
PublicationW artykule opisano programowalny wzmacniacz transkonduktancyjny oraz konfigurowalny blok analogowy CAB składający się ze wzmacniacza transkonduktancyjnego, kluczy oraz programowalnego kondensatora. Z bloków CAB można zbudować uniwersalne, programowalne filtry. Wzmacniacz transkondukancyjny został przesymulowany oraz wykonany w technologii CMOS. Wyniki pomiarów pokazują, że transkonduktancja wzmacniacza może być przestrajana ponad...
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In-ADC, Rank-Order Filter for Digital Pixel Sensors
PublicationThis paper presents a new implementation of the rank-order filter, which is established on a parallel-operated array of single-slope (SS) analog-to-digital converters (ADCs). The SS ADCs use an “on-the-ramp processing” technique, i.e., filtration is performed along with analog-to-digital conversion, so the final states of the converters represent a filtered image. A proof-of-concept 64 × 64 array of SS ADCs, integrated with MOS...
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A CMOS Pixel With Embedded ADC, Digital CDS and Gain Correction Capability for Massively Parallel Imaging Array
PublicationIn the paper, a CMOS pixel has been proposed for imaging arrays with massively parallel image acquisition and simultaneous compensation of dark signal nonuniformity (DSNU) as well as photoresponse nonuniformity (PRNU). In our solution the pixel contains all necessary functional blocks: a photosensor and an analog-to-digital converter (ADC) with built-in correlated double sampling (CDS) integrated together. It is implemented in...
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Single-Slope ADC With Embedded Convolution Filter for Global-Shutter CMOS Image Sensors
PublicationThis brief presents an analog-to-digital converter (ADC) suitable for acquisition and processing of images in the global-shutter mode at the pixel level. The ADC consists of an analog comparator, a multi-directional shift register for the comparator states, and a 16-bit reversible binary counter with programmable step size. It works in the traditional single-slope mode. The novelty is that during each step of the reference ramp,...
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REALIZACJA ELEMENTÓW SKŁADOWYCH ŁĄCZA RADIOWEGO Z UŻYCIEM URZĄDZEŃ RADIA PROGRAMOWALNEGO TYPU USRP
PublicationPrzez ostatnią dekadę projektowanie systemów radiowych zaczęło w coraz większym stopniu polegać na cyfrowym przetwarzaniu sygnałów. Możliwość i moc obliczeniowa procesorów ogólnego przeznaczenia GPP (General Purpose Processor), procesorów sygnałowych DSP (Digital Signal Processor) oraz układów programowalnych FPGA (Field Programmable Gate Array) znacząco wzrosła zgodnie z prawem Moor’a. Naturalnym następstwem tego trendu było większe...
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Contactless hearing aid designed for infants
PublicationIt is a well known fact that language development through home intervention for a hearing-impaired infant should start in the early months of a newborn baby's life. The aim of this paper is to present a concept of a contactless digital hearing aid designed especially for infants. In contrast to all typical wearable hearing aid solutions (ITC, ITE, BTE), the proposed device is mounted in the infant's bed with any parts of its set-up...
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HILS for the Design of Three-Wheeled Mobile Platform Motion Surveillance System with a Use of Energy Performance Index
PublicationCurrent tendency in mechatronic design requires the use of comprehensive development of an environment, which gives the possibility to prototype, design, simulate and integrate with dedicated hardware. The paper discusses the Hardware-In-the-Loop Simulations (HILS) mechatronic technique, used during the design of the surveillance system based on energy performance index. The presented test configuration (physical controller – emulated...
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CMOS realisation of analogue processor for early vision processing
PublicationThe architecture concept of a high-speed low-power analogue vision chip, which performs low-level real-time image algorithms ispresented. The proof-of-concept prototype vision chip containing 32 × 32 photosensor array and 32 analogue processors is fabricated usinga 0.35 μm CMOS technology. The prototype can be configured to register and process images with very high speed, reaching 2000 framesper second, or achieve very low power...
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Shared processor scheduling
PublicationWe study the shared processor scheduling problem with a single shared processor to maximize total weighted overlap, where an overlap for a job is the amount of time it is processed on its private and shared processor in parallel. A polynomial-time optimization algorithm has been given for the problem with equal weights in the literature. This paper extends that result by showing an (log)-time optimization algorithm for a class...
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Acoustic Processor of the MCM Sonar
PublicationThis paper presents the concept of an acoustic processor of the mine countermeasure sonar. Developed at the Department of Marine Electronics Systems, Gdansk University of Technology, the acoustic processor is an element of the MG-89, a modernised underwater acoustic station. The focus of the article is on the modules of the processor. They are responsible for sampling analogue signals and implementing the algorithms controlling...
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A new concept of PWM duty cycle computation using the Barycentric Coordinates in a Three-Dimensional voltage vectors arrangement
PublicationThe paper presents a novel approach to the Pulse Width Modulation (PWM) duty cycle computing for complex or irregular voltage vector arrangements in the two (2D) and three–dimensional (3D) Cartesian coordinate systems. The given vectors arrangement can be built using at least three vectors or collections with variable number of involved vectors (i.e. virtual vectors). Graphically, these vectors form a convex figure, in particular,...
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Shared multi-processor scheduling
PublicationWe study shared multi-processor scheduling problem where each job can be executed on its private processor and simultaneously on one of many processors shared by all jobs in order to reduce the job’s completion time due to processing time overlap. The total weighted overlap of all jobs is to be maximized. The problem models subcontracting scheduling in supply chains and divisible load scheduling in computing. We show that synchronized...
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Acoustic Processor of the Mine Countermeasure Sonar
PublicationThis paper presents the concept of an acoustic processor of the mine countermeasure sonar. Developed at the Department of Marine Electronics Systems, Gdansk University of Technology, the acoustic processor is an element of the MG-89, an underwater acoustic station. The focus of the article is on the modules of the processor. They are responsible for sampling analogue signals and implementing the algorithms controlling the measurement...
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An Analog Sub-Miliwatt CMOS Image Sensor With Pixel-Level Convolution Processing
PublicationA new approach to an analog ultra-low power medium-resolution vision chip design is presented. The prototype chip performs low-level image processing algorithms in real time. Only a photo-diode, MOS switches and two capacitors are used to create an analog processing element (APE) that is able to realize any convolution algorithm based on a full 3x3 kernel. The proof-of-concept circuit is implemented in 0.35 µm CMOS technology,...
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Shared processor scheduling of multiprocessor jobs
PublicationWe study a problem of shared processor scheduling of multiprocessor weighted jobs. Each job can be executed on its private processor and simultaneously on possibly many processors shared by all jobs. This simultaneous execution reduces their completion times due to the processing time overlap. Each of the m shared processors may charge a different fee but otherwise the processors are identical. The goal is to maximize the total...
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Numerical Test for Stability Evaluation of Analog Circuits
PublicationIn this contribution, a new numerical test for the stability evaluation of analog circuits is presented. Usually, if an analog circuit is unstable then the roots of its characteristic equation are localized on the right half-plane of the Laplace s- plane. Because this region is unbounded, we employ the bilinear transformation to map it into the unit disc on the complex plane. Hence, the existence of any root inside the unit disc...
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Multifrequency Wideband Sonar Array
PublicationThis paper describes of new approach to Multifrequency Wideband Arrays (MWA),applied piezocomposite technologies of the array elements. MWA operating in transmitting(Tx) and receiving (Rx) mode on two or three bands, requires state-of-the-art technology andefficient array designing than conventional array in which separate arrays for every band oreven separate Tx and Rx transducers/arrays are used. The new piezocomposite elements...
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Prediction of Processor Utilization for Real-Time Multimedia Stream Processing Tasks
PublicationUtilization of MPUs in a computing cluster node for multimedia stream processing is considered. Non-linear increase of processor utilization is described and a related class of algorithms for multimedia real-time processing tasks is defined. For such conditions, experiments measuring the processor utilization and output data loss were proposed and their results presented. A new formula for prediction of utilization was proposed...
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High-precision bearing estimation for active sonar with cylindrical array performed by interpolated array transformation
PublicationThe article presents a method for improving the accuracy of bearing in multibeam sonar with a cylindrical array. The antenna’s non-linear shape and the resulting non-uniform sampling of the signal in space, mean that known methods of high-resolution spectral analysis cannot be used. In order to apply an algorithm from this group, a linear virtual antenna must be produced. The paper presents a technique of mapping a cylindrical...
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Is Digitalization Improving Governance Quality? Correlating Analog and Digital Benchmarks
PublicationThe digitalization of public governance and the resulting concept of electronic governance is a characteristic feature of contemporary information society. Both can be defined as the process and outcome of digital transformation: transformation of the “analog” version of governance into “digital” governance. Measuring both versions of governance against typical performance measures of efficiency, effectiveness, equity, openness...
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On analog comparators for CMOS digital pixel applications. A comparative study
PublicationVoltage comparator is the only – apart from the light-to-voltage converter – analog component in the digital CMOS pixel. In this work, the influence of the analog comparator nonidealities on the performance of the digital pixel has been investigated. In particular, two versions of the digital pixel have been designed in 0.35 μm CMOS technology, each using a different type of analog comparator. The properties of both versions have...
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Fast implementation of FDTD-compatible green's function on multicore processor
PublicationIn this letter, numerically efficient implementation of the finite-difference time domain (FDTD)-compatible Green's function on a multicore processor is presented. Recently, closed-form expression of this discrete Green's function (DGF) was derived, which simplifies its application in the FDTD simulations of radiation and scattering problems. Unfortunately, the new DGF expression involves binomial coefficients, whose computations...
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A nine-input 1.25 mW, 34 ns CMOS analog median filter for image processing in real time
PublicationIn this paper an analog voltage-mode median filter, which operates on a 3 × 3 kernel is presented. The filter is implemented in a 0.35 μm CMOS technology. The proposed solution is based on voltage comparators and a bubble sort configuration. As a result, a fast (34 ns) time response with low power consumption (1.25 mW for 3.3 V) is achieved. The key advantage of the configuration is relatively high accuracy of signal processing,...
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Equal Baseline Camera Array—Calibration, Testbed and Applications
PublicationThis paper presents research on 3D scanning by taking advantage of a camera array consisting of up to five adjacent cameras. Such an array makes it possible to make a disparity map with a higher precision than a stereo camera, however it preserves the advantages of a stereo camera such as a possibility to operate in wide range of distances and in highly illuminated areas. In an outdoor environment, the array is a competitive alternative...
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Using an IEEE1149.1 Test Bus for Fault Diagnosis of Analog Parts of Electronic Embedded Systems
PublicationThe new solution of a BIST called the JTAG BIST for self-testing of analog parts of electronic embedded systems is presented in the paper. The JTAG BIST consists of the BCT8244A and SCANSTA476 integrated circuits of Texas Instruments controlled via the IEEE 1149.1 bus. The BCT8244A is a scan test device with octal buffers, and the SCANSTA476 is a 12-bit ADC with 8 analog input channels. Self-testing approach is based on the fault...
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Structural optimization of microjet array cooling system
PublicationThe single phase heat transfer from an upward facing, horizontal copper surface to arrays of impinging water jets was experimentally investigated. Experimental configuration allows for a free-surface unconfined jets flow. Square nozzles 50 × 100 μm arranged in four different geometries were used. Additionally, for the set of two jets array geometry was varied by adjusting the nozzle to nozzle distance. The area averaged heat transfer...
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Compact antenna array comprising fractal-shaped microstripradiators
PublicationA design method of antenna array consisting of eight microstrip patches modified with Sierpinski fractal curves has been presented andexperimentally validated in this paper. Method proposed has enabled the achievement of considerable miniaturization of array length (26%),together with multi-band behavior of the antenna, which proves the attractiveness of presented design methodology and its ability to be implemented in more complex...
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A testing method of analog parts of mixed-signal electronic systems equipped with the IEEE1149.1 test bus
PublicationA new solution of the JTAG BIST for testing analog circuits in mixed-signal electronic microsystems controlled by microcontrollers and equipped with the IEEE1149.1 bus is presented. It is based on a new fault diagnosis method in which an analog circuit is stimulated by a buffered signal from the TMS line, and the time response of the circuit to this signal is sampled by the ADC equipped with the JTAG. The method can be used for...
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An Ultra-Low-Energy Analog Comparator for A/D Converters in CMOS Image Sensors
PublicationThis paper proposes a new solution of an ultra-low-energy analog comparator, dedicated to slope analog-to-digital converters (ADC), particularly suited for CMOS image sensors (CISs) featuring a large number of ADCs. For massively parallel imaging arrays, this number may be as high as tens-hundreds of thousands ADCs. As each ADC includes an analog comparator, the number of these comparators in CIS is always high. Detailed analysis...
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Self-Testing of Analog Parts Terminated by ADCs Based on Multiple Sampling of Time Responses
PublicationA new approach for self-testing of analog parts terminated by analog-to-digital converters in mixed-signal electronic microsystems controlled by microcontrollers is presented. It is based upon a new fault diagnosis method using a transformation of the set of voltage samples of the time response of a tested analog part to a square impulse into localization curves placed in a multidimensional measurement space. The method can be used...
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A Conformal Circularly Polarized Series-Fed Microstrip Antenna Array Design
PublicationA conformal circularly polarized series-fed microstrip array design for broadside radiation is presented. The array aperture under design is conformal to a cylindrical surface of a given radius. The approach we present primarily addresses focusing of the circularly polarized major lobe of the conformal array by proper dimensioning of the aperture spacings. The proposed analytical models yield the values of the element spacings...
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Millimeter Wave Negative Refractive Index Metamaterial Antenna Array
PublicationIn this paper, a novel negative refractive index metamaterial (NIM) is developed and characterized. The proposed metamaterial exhibits negative effective permittivity (εeffe) and negative effective permeability (µeffe) at millimeter wave frequency of 28GHz. This attractive feature is utilized to enhance the gain of a microstrip patch antenna (MPA). Two thin layers of 5 5 subwavelength unit cell array of NIM are placed above a...
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On simplification of residue scaling process in pipelined Radix-4 MQRNS FFT processor
PublicationResidue scaling is needed in pipelined FFT radix-4 processors based on the Modified Quadratic Residue Number System (MQRNS) at the output of each butterfly. Such processor uses serial connection of radix-4 butterflies. Each butterfly comprises n subunits, one for each modulus of the RNS base and generates four complex residue numbers. In order to prevent arithmetic overflow intermediate results after each butterfly have to be...
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On configuration of residue scaling process in pipelined radix-4 MQRNS FFT processor
PublicationResidue scaling is needed in pipelined FFT radix-4 processors based on the Modified Quadratic Residue Number System (MQRNS) at the output of each butterfly. Such processor uses serial connection of radix-4 butterflies. Each butterfly comprises n subunits, one for each modulus of the RNS base and outputs four complex residue numbers. In order to prevent the arithmetic overflow in the succesive stage, every number has to be scaled,...
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The Linear Array 2x1 of Slot Monopoles for 6-8.5 GHZ UWB Standard
PublicationThe results of numerical simulations and measurements of 2x1 linear array of slot monopoles are presented in the paper. At the begining a single slot monopole was designed. Next the 2x1 linear array of these monopoles was numerically tested for various configurations of the feeding network. The single monopole and the array were fabricated and the results of the measurements of the reflection coefficients and the radiationpatterns...
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Optimal configuration of an electrode array for measuring ventricles' contraction
PublicationAn influence of an electrode-array configuration on an impedance signal composition for a fixed spatial distribution of its sources is examined in the paper. The Finite Element Method and Geselowitz relationship were used for examining three different electrode-arrays. A sensitivity approach was used to evaluate each configuration assuming that localization of the signal source is known. A conductivity change, thus the source of...
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Development of Gas Sensor Array for Methane Reforming Process Monitoring
PublicationThe article presents a new method of monitoring and assessing the course of the dry methane reforming process with the use of a gas sensor array. Nine commercially available TGS chemical gas sensors were used to construct the array (seven metal oxide sensors and two electrochemical ones). Principal Component Regression (PCR) was used as a calibration method. The developed PCR models were used to determine the quantitative parameters...
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Frequency Selective Surface Based MIMO Antenna Array for 5G Millimeter-Wave Applications
PublicationAbstract: In this paper a radiating element consisting of a modified circular patch is proposed for MIMO arrays for 5G millimeter-wave applications. The radiating elements in the proposed 2×2 MIMO antenna array are orthogonally configured relative to each other to mitigate mutual coupling that would otherwise degrade the performance of the MIMO system. The MIMO array was fabri-cated on Rogers RT/Duroid high frequency substrate...
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Azimuth estimator for a rotating array radar with wide beam
PublicationThe problem of estimating azimuth in rotating array radar with a beam, wide in the azimuth plane, is considered. Under such setup the echo signal usually has a very low signal to noise ratio, but the number of observations is large, because of long dwell times. The proposed solution is based on the maximum likelihood approach, but it employs simplifications which facilitate its implementation in real time systems. Results, obtained...
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Improving the accuracy of bearing in active sonar with cylindrical array using spectrum estimation.
PublicationThe articles presents a method for improving the accuracy of bearing in multibeam sonar with a cylindrical array. Based on a known spatial spectrum estimation technique, the method has been successfully used in linear array systems. Its accuracy of bearing is satisfactory and ensures a relatively low computational effort. The article discusses certain simplifications and assumptions to adapt the spatial spectrum estimation technique...
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ARRAY OF MINIJETS – THERMAL AND HYDRAULIC PHENOMENA IN BOUNDARY LAYER
PublicationPresented work considers flow and thermal phenomena occurring in the system consisting of minijets array and heated with constant heat flux surface. Numerical analyses, based on the mass, momentum and energy conservation laws, were conducted. Focus was placed on the proper model construction, in which turbulence and boundary layer modelling was crucial. Calculations were done for various mass flow rates. The main calculations were...
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Rapid design closure of linear microstrip antenna array apertures using response features
PublicationA simple yet reliable approach to a rapid design closure of linear antenna array apertures at the electromagnetic (EM)-simulation level is proposed. Our methodology exploits an underlying array factor (AF) model suitably corrected by means of characteristic points (angles and levels) of the radiation pattern of the EM model of the antenna array aperture. This conveniently allows for controlling both the side lobe levels...
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THE SYNCHROSQUEEZING METHOD IN BEARING ESTIMATION OF STATIONARY SIGNALS FOR PASSIVE SONAR WITH TOWED ARRAY
PublicationIn this paper, a novel method of bearing estimation in a passive sonar system with a towed array is introduced. The classical approach of bearing estimation based on the spatial spectrum [1] is extended by using the synchrosqeezing method that is a part of the reassignment method introduced by Kodera et al. [2]. Using this method leads to a precise bearing estimation. The proposed method requires a relatively small amount of computation,...
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D-Band High Gain Planer Slot Array Antenna using Gap Waveguide Technology
PublicationA D-band high gain slot array antenna with corporate-fed distribution network based on gap waveguide structures is proposed at 140GHz. To overcome the fabrication challenges at such high frequency, the gap waveguide technology is deployed in which good electrical contact between different parts of the waveguide structure is not required. The proposed sub-array has four radiating slots that are excited by a groove gap cavity and...
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A method of self-testing of an analog circuit terminated by an ADC in electronic embedded systems controlled by microcontrollers
PublicationA new self-testing method of analog parts terminated by an ADC in electronic embedded systems controlled by microcontrollers is presented. It is based on a new fault diagnosis method based on on-line (i.e. during measurement), transformations of voltage samples of the time response of a tested part to a square pulse - onto localization curves placed in the measurement space. The method can be used for fault detection and single...
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New Two-center Ellipsoidal Basis Function Neural Network for Fault Diagnosis of Analog Electronic Circuits
PublicationIn the paper a new fault diagnosis-oriented neural network and a diagnostic method for localization of parametric faults in Analog Electronic Circuits (AECs) with tolerances is presented. The method belongs to the class of dictionary Simulation Before Test (SBT) methods. It utilizes dictionary fault signatures as a family of identification curves dispersed around nominal positions by component tolerances of the Circuit Under Test...
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Analog fault signature based on sigma-delta modulation and oscillation-test methodology.
PublicationW artykule dokonano przeglądu prac z zakresu testowania układów elektronicznych metodą oscylacyjną. Wskazując na niedostatki aktualnie stosowanej techniki testowania oscylacyjnego zaproponowano nową sygnaturę uszkodzeń dla układów analogowych. Proponowany parametr diagnostyczny jest wydobywany z odpowiedzi czasowej oscylatora testującego, w układzie złożonym z detektora szczytowego, modulatora sigma-delta oraz licznika rewersyjnego....
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A method of self-testing of analog circuits based on fully differential op-amps with theTCBF classifier
PublicationA new approach of self-testing of analog circuits based on fully differential op-amps of mixed-signal systems controlled by microcontrollers is presented. It consists of a measurement procedure and a fault diagnosis procedure. We measure voltage samples of a time response of a tested circuit on a stimulation of a unit step function given at the common-mode reference voltage input of the op-amp. The fault detection and fault localization...