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Search results for: FIELD PROGRAMMABLE GATE ARRAYS , HARDWARE ACCELERATION , SCIENTIFIC COMPUTING , ELECTROMAGNETICS
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Acceleration of Electromagnetic Simulations on Reconfigurable FPGA Card
PublicationIn this contribution, the hardware acceleration of electromagnetic simulations on the reconfigurable field-programmable-gate-array (FPGA) card is presented. In the developed implementation of scientific computations, the matrix-assembly phase of the method of moments (MoM) is accelerated on the Xilinx Alveo U200 card. The computational method involves discretization of the frequency-domain mixed potential integral equation using...
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FPGA implementation of the multiplication operation in multiple-precision arithmetic
PublicationAlthough standard 32/64-bit arithmetic is sufficient to solve most of the scientific-computing problems, there are still problems that require higher numerical precision. Multiple-precision arithmetic (MPA) libraries are software tools for emulation of computations in a user-defined precision. However, availability of a reconfigurable cards based on field-programmable gate arrays (FPGAs) in computing systems allows one to implement...
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Verification and Benchmarking in MPA Coprocessor Design Process
PublicationThis paper presents verification and benchmarking required for the development of a coprocessor digital circuit for integer multiple-precision arithmetic (MPA). Its code is developed, with the use of very high speed integrated circuit hardware description language (VHDL), as an intellectual property core. Therefore, it can be used by a final user within their own computing system based on field-programmable gate arrays (FPGAs)....
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IP Core of Coprocessor for Multiple-Precision-Arithmetic Computations
PublicationIn this paper, we present an IP core of coprocessor supporting computations requiring integer multiple-precision arithmetic (MPA). Whilst standard 32/64-bit arithmetic is sufficient to solve many computing problems, there are still applications that require higher numerical precision. Hence, the purpose of the developed coprocessor is to support and offload central processing unit (CPU) in such computations. The developed digital...
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Open-Source Coprocessor for Integer Multiple Precision Arithmetic
PublicationThis paper presents an open-source digital circuit of the coprocessor for an integer multiple-precision arithmetic (MPA). The purpose of this coprocessor is to support a central processing unit (CPU) by offloading computations requiring integer precision higher than 32/64 bits. The coprocessor is developed using the very high speed integrated circuit hardware description language (VHDL) as an intellectual property (IP) core. Therefore,...
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Object oriented grid computing for computational electromagnetics
PublicationArtykuł opisuje bibliotekę WiCommGrid napisaną w języku java, która realizuje ideę wymiany informacji pomiędzy węzłami środowiska rozproszonego z zastosowaniem programowania zorientowanego obiektowo. Biblioteka ta przystosowana jest do współdziałania z wieloma systemami operacyjnymi oraz z rożnym środowiskiem sprzętowym. Zbudowaną aplikację zastosowano do zrównoleglonych obliczeń rozkładu pola elektromagnetycznego w oparciu o algorytm...
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Block Conjugate Gradient Method with Multilevel Preconditioning and GPU Acceleration for FEM Problems in Electromagnetics
PublicationIn this paper a GPU-accelerated block conjugate gradient solver with multilevel preconditioning is presented for solving large system of sparse equations with multiple right hand-sides (RHSs) which arise in the finite-element analysis of electromagnetic problems. We demonstrate that blocking reduces the time to solution significantly and allows for better utilization of the computing power of GPUs, especially when the system matrix...
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Pipelined sceling of signed residue numbers with the mixed-radix conversion in the programmable gate array
PublicationIn this work a scaling technique of signed residue numbers is proposed. The method is based on conversion to the Mixed-Radix System (MRS) adapted for the FPGA implementation. The scaling factor is assumed to be a moduli product from the Residue Number System (RNS) base. Scaling is performed by scaling of terms of the mixed-radix expansion, generation of residue reprezentation of scaled terms, binary addition of these representations...
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Pipelined division of signed numbers with the use of residue arithmetic for small number range with the programmable gate array
PublicationIn this work an architecture of the pipelined signed residue divider for the small number range is presented. Its operation is based on reciprocal calculation and multiplication by the dividend. The divisor in the signed binary form is used to compute the approximated reciprocal in the residue form by the table look-up. In order to limit the look-up table address an algorithm based on segmentation of the divisor into two segments...
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Analog filter design system for field programmable analog array.
PublicationObiektowy system do automatycznego projektowania filtrów kaskadowych i symetrycznych filtrów FLF z wykorzystaniem wzmacniaczy transkonuktancyjnych OTACi bloków bikwadratowych z optymalizacją zakresu dynamiki, zniekształceń i wrażliwości. System umożliwia realizację standardowych aproksymacji charakterystyk amplitudowych oraz dowolnie zdefiniowanych przez użytkownika.
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Hydraulic gate contact areas in view of investigation and field experience
PublicationW pracy podano ogólny przegląd dotyczący określenia powierzchni kontaktowych zamknięć wodnych. Szczególną uwagę zwrócono na siły występujące w powierzchniach kontaktowych zamknięć, trybologię i inne zjawiska mające wpływ na rozwiązania problemów kontowych określających sprawność zamknięć. Ważnym zagadnieniem jest dobór materiału i określenie jego właściwości na podstawie badań laboratoryjnych i oceny pracy tego materiału w wyniku...
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Low-Cost Open-Hardware System for Measurements of Antenna Far-Field Characteristics in Non-Anechoic Environments
PublicationExperimental validation belongs to the most important steps in the development of antenna structures. Measurements are normally performed in expensive, dedicated facilities such as anechoic chambers, or open-test sites. A high cost of their construction might not be justified when the main goal of antenna verification boils down to demonstration of the measurement procedure, or rough validation of the simulation models used for...
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WOMEN'S SCIENTIFIC ACTIVITIES IN THE FIELD OF GEOMATICS, BY THE LIGHT OF CONFERENCE GEOMATICS 2016
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A field programmable analog array for CMOS continuous-time OTA-C filter applications
PublicationW artykule opisano programowalny wzmacniacz transkonduktancyjny oraz konfigurowalny blok analogowy CAB składający się ze wzmacniacza transkonduktancyjnego, kluczy oraz programowalnego kondensatora. Z bloków CAB można zbudować uniwersalne, programowalne filtry. Wzmacniacz transkondukancyjny został przesymulowany oraz wykonany w technologii CMOS. Wyniki pomiarów pokazują, że transkonduktancja wzmacniacza może być przestrajana ponad...
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JOURNAL OF SCIENTIFIC COMPUTING
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Analysis of Reliability Structures for Fire Signaling Systems in the Field of Fire Safety and Hardware Requirements
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Paweł Czarnul dr hab. inż.
PeoplePaweł Czarnul obtained a D.Sc. degree in computer science in 2015, a Ph.D. in computer science granted by a council at the Faculty of Electronics, Telecommunications and Informatics, Gdansk University of Technology in 2003. His research interests include:parallel and distributed processing including clusters, accelerators, coprocessors; distributed information systems; architectures of distributed systems; programming mobile devices....
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Jerzy Konorski dr hab. inż.
PeopleJerzy Konorski received his M. Sc. degree in telecommunications from Gdansk University of Technology, Poland, and his Ph. D. degree in computer science from the Polish Academy of Sciences, Warsaw, Poland. In 2007, he defended his D. Sc. thesis at the Faculty of Electronics, Telecommunications and Informatics, Gdansk University of Technology. He has authored over 150 papers, led scientific projects funded by the European Union,...
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IEEE Symposium on Field Programmable Custom Computing Machines
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Ireneusz Czarnowski Prof.
PeopleIRENEUSZ CZARNOWSKI is a graduate of the Faculty of Electrical Engineering at Gdynia Maritime University. He gained a doctoral degree in the field of computer science at Poznan University of Technology and a postdoctoral degree in the field of computer science at Wroclaw University of Science and Technology. Since 1998 is associated with Gdynia Maritime University, currently is a professor of computer science in the Department...
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Deciphering the Molecular Mechanism of Substrate-Induced Assembly of Gold Nanocube Arrays toward an Accelerated Electrocatalytic Effect Employing Heterogeneous Diffusion Field Confinement
PublicationThe complex electrocatalytic performance of gold nanocubes (AuNCs) is the focus of this work. The faceted shapes of AuNCs and the individual assembly processes at the electrode surfaces define the heterogeneous conditions for the purpose of electrocatalytic processes. Topographic and electron imaging demonstrated slightly rounded AuNC (average of 38 nm) assemblies with sizes of ≤1 μm, where the dominating patterns are (111) and...
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International Journal of Modeling Simulation and Scientific Computing
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Report for the Short Term Scientific Mission within COST Action FP1101: development of the in-field sensor for estimation of fracture toughness and shear strength by measuring cutting forces
PublicationKnowledge on the fracture properties of materials is essential to assure structural integrity and proper design of mechanical connections in timber constructions. Measurement of this property is, however, a very challenging task. The linear fracture mechanics is usually used for its assessment assisted with experimental data acquired by means of various techniques, usually of destructive nature. The cutting force is an energetic...
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A Note on Fractional Curl Operator
PublicationIn this letter, we demonstrate that the fractional curl operator, widely used in electromagnetics since 1998, is essentially a rotation operation of components of the complex Riemann–Silberstein vector representing the electromagnetic field. It occurs that after the wave decomposition into circular polarisations, the standard duality rotation with the angle depending on the fractional order is applied to the left-handed basis vector...
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Routing Method for Interplanetary Satellite Communication in IoT Networks Based on IPv6
PublicationThe matter of interplanetary network (IPN) connection is a complex and sophisticated topic. Space missions are aimed inter alia at studying the outer planets of our solar system. Data transmission itself, as well as receiving data from satellites located on the borders of the solar system, was only possible thanks to the use of powerful deep space network (DSN) receivers, located in various places on the surface of the Earth. In...
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FPGA Based Real Time Simulations of the Face Milling Process
PublicationThe article presents a successful implementation of the milling process simulation at the Field-Programmable Gate Array (FPGA). By using FPGA, very rigorous Real-Time (RT) simulation requirements can be met. The response time of the FPGA simulations is significantly reduced, and the time synchronization is better than in a typical RT system implemented in software. The FPGA-based approach is characterized by enormous flexibility...
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Power equalization of AES FPGA implementation
PublicationThis paper briefly introduces side channel attacks on cryptographic hardware with special emphasis on differential power analysis(DPA). Based on existing countermeasures against DPA, design method combining power equalization for synchronous and combinatorialcircuits has been proposed. AES algorithm has been implemented in Xilinx Spartan II-E field programmable gate array (FPGA) deviceusing the standard and power-equalized methods....
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FPGA-Based System for Electromagnetic Interference Evaluation in Random Modulated DC/DC Converters
PublicationField-Programmable Gate Array (FPGA) provides the possibility to design new “electromagnetic compatibility (EMC) friendly” control techniques for power electronic converters. Such control techniques use pseudo-random modulators (RanM) to control the converter switches. However, some issues connected with the FPGA-based design of RanM, such as matching the range of fixed-point numbers, might be challenging. The modern programming...
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FPGA Acceleration of Matrix-Assembly Phase of RWG-Based MoM
PublicationIn this letter, the field-programmable-gate-array accelerated implementation of matrix-assembly phase of the method of moments (MoM) is presented. The solution is based on a discretization of the frequency-domain mixed potential integral equation using the Rao-Wilton-Glisson basis functions and their extension to wire-to-surface junctions. To take advantage of the given hardware resources (i.e., Xilinx Alveo U200 accelerator card),...
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Speed sensorless induction motor drive with predictive current controller
PublicationToday, speed sensorless modes of operation are becoming standard solutions in the area of electric drives. This paper presents a speed sensorless control system of an induction motor with a predictive current controller. A closed-loop estimation system with robustness against motor parameter variation is used for the control approach. The proposed algorithm has been implemented using field-programmable gate arrays (FPGAs) and a...
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Aleksandra Parteka dr hab. inż.
PeopleAbout me: I am an associate professor and head of doctoral studies at the Faculty of Management and Economics, Gdansk University of Technology (GdanskTech, Poland). I got my MSc degree in Economics from Gdansk University of Technology (2003) and Universita’ Politecnica delle Marche (2005), as well as MA degree in Contemporary European Studies from Sussex University (2006, with distinction). I received my PhD in Economics...
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The time-varying low-frequency magnetic-field emitted from the ship’s inverter-fed induction motor
Open Research DataThe dataset contains the magnetic field measurement results that are part of a comprehensive study on the assessment of the magnetic field emissions onboard of the research-training vessel. The measurements were carried out, nearby the bow thruster motor fed from the inverter, during maneuvering and the sea voyage. The bow thruster is assembled in the...
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Natalia Sokół dr inż.
PeopleBACKGROUND Master of Science in Light and Lighting (2008-2009/11) The UCL Bartlett School of Graduate Studies, Faculty of the Built Environment, London, UK, www.bartlett.ucl.ac.uk MA Degree in Interior Architecture (1999-2004), The Academy of Fine Arts, Poznan, Poland, www.uap.edu.pl MA Degree in Art Education (1997-2002), Academy of Fine Arts, Poznan, Poland, www.uap.edu.pl MAIN RESEARCH AREAS · ...
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FPGA-Based Implementation of Real Time Optical Flow Algorithm and Its Applications for Digital Image Stabilization
PublicationAn efficient simplification procedure of the optical flow (OF) algorithm as well as its hardware implementation using the field programmable gate array (FPGA) technology is presented. The modified algorithm is based on block matching of subsets of successive frames, and exploits one-dimensional representation of subsets as well as the adaptive adjustments of their sizes. Also, an l1-norm-based correlation function requiring no...
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SIAM JOURNAL ON SCIENTIFIC COMPUTING
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Bogdan Pankiewicz dr hab. inż.
PeopleBogdan Pankiewicz graduated in 1993 from the Department of Electronics at Gdansk University of Technology (GUT) and in 2002 he obtained a doctoral degree in the field of electronics at the Faculty of Electronics, Telecommunications and Informatics at GUT. From the beginning of his career he is associated with GUT: first as an assistant (years 1994-2002) and then as assistant professor (since 2002) at the Faculty of Electronics,...
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HILS for the Design of Three-Wheeled Mobile Platform Motion Surveillance System with a Use of Energy Performance Index
PublicationCurrent tendency in mechatronic design requires the use of comprehensive development of an environment, which gives the possibility to prototype, design, simulate and integrate with dedicated hardware. The paper discusses the Hardware-In-the-Loop Simulations (HILS) mechatronic technique, used during the design of the surveillance system based on energy performance index. The presented test configuration (physical controller – emulated...
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Implementation of Coprocessor for Integer Multiple Precision Arithmetic on Zynq Ultrascale+ MPSoC
PublicationRecently, we have opened the source code of coprocessor for multiple-precision arithmetic (MPA). In this contribution, the implementation and benchmarking results for this MPA coprocessor are presented on modern Zynq Ultrascale+ multiprocessor system on chip, which combines field-programmable gate array with quad-core ARM Cortex-A53 64-bit central processing unit (CPU). In our benchmark, a single coprocessor can be up to 4.5 times...
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Deep learning in the fog
PublicationIn the era of a ubiquitous Internet of Things and fast artificial intelligence advance, especially thanks to deep learning networks and hardware acceleration, we face rapid growth of highly decentralized and intelligent solutions that offer functionality of data processing closer to the end user. Internet of Things usually produces a huge amount of data that to be effectively analyzed, especially with neural networks, demands high...
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X-ray Photoelectron Spectroscopy studies of laser-induced titania nanotubes
Open Research DataThis dataset contains the results of high-resolution XPS studies obtained during the formation of the hollow nanopillar arrays through the laser-induced transformation of titania nanotubes.
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Barriers to and Facilitators of Scientific Productivity: A Case Study from Polish Technical University
PublicationScientific productivity plays an essential role in the creation of innovation and it stimulates social and economic growth. This study aimed to identify the barriers to and facilitators of scientific productivity in engineering and technology field, as perceived from the perspective of academic managers. Along with quality approach, the study relied on semi-structured interviews with managing bodies, i.e. seven deans and deputy...
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FPGA realization of an improved alpha max plus beta min algorithm
PublicationThe generalized improved version of the alpha max plus beta min square-rooting algorithm and its realization in the Field Programmable Gate Array (FPGA) are presented. The algorithm computes the square root to calculate the approximate magnitude of a complex sample. It is especially useful for pipelined calculations in the DSP. In case of four approximation regions it is possible to reduce the peak error form 3.95% to 0.33%. This...
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A New, Reconfigurable Circuit Offering Functionality of AND and OR Logic Gates for Use in Algorithms Implemented in Hardware
PublicationThe paper presents a programmable (using a 1-bit signal) digital gate that can operate in one of two OR or AND modes. A circuit of this type can also be implemented using conventional logic gates. However, in the case of the proposed circuit, compared to conventional solutions, the advantage is a much smaller number of transistors necessary for its implementation. Circuit is also much faster than its conventional counterpart. The...
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Fundamental properties of solutions to fractional-order Maxwell's equations
PublicationIn this paper, fundamental properties of solutions to fractional-order (FO) Maxwell's equations are analysed. As a starting point, FO Maxwell's equations are introduced in both time and frequency domains. Then, we introduce and prove the fundamental properties of electromagnetic field in FO electromagnetics, i.e. energy conservation, uniqueness of solutions, and reciprocity. Furthermore, the algorithm of the plane wave simulation...
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Programmable Input Mode Instrumentation Amplifier Using Multiple Output Current Conveyors
PublicationIn this paper a programmable input mode instrumentation amplifier (IA) utilising second generation, multiple output current conveyors and transmission gates is presented. Its main advantage is the ability to choose a voltage or current mode of inputs by setting the voltage of two configuration nodes. The presented IA is prepared as an integrated circuit block to be used alone or as a sub-block in a microcontroller or in a field...
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Computer Algebra in Scientific Computing
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Electrical characteristics simulation of top-gated graphene field-effect transistor (GFET) with 10 μm x 10 μm graphene channel
Open Research DataThe presented data set is part of the research on graphene field-effect transistor (GFET) modelling. The calculations were performed with the use of GFET Tool program (https://nanohub.org/resources/gfettool DOI: 10.4231/D3QF8JK5T), which enabled simulation of the drain current (Id) vs. drain voltage (Vd) characteristics for different gate voltages (Vg)...
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Electrical characteristics simulation of top-gated graphene field-effect transistor (GFET) with 10 μm x 3 μm graphene channel
Open Research DataThe presented data set is part of the research on graphene field-effect transistor (GFET) modelling. The calculations were performed with the use of GFET Tool program (https://nanohub.org/resources/gfettool DOI: 10.4231/D3QF8JK5T), which enabled simulation of the drain current (Id) vs. drain voltage (Vd) characteristics for different gate voltages (Vg)...
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Workshop on Scientific Knowledge, Information, and Computing
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Roland Wesolowski Ph.D.
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