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Search results for: FIELD PROGRAMMABLE GATE ARRAYS
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Routing Method for Interplanetary Satellite Communication in IoT Networks Based on IPv6
PublicationThe matter of interplanetary network (IPN) connection is a complex and sophisticated topic. Space missions are aimed inter alia at studying the outer planets of our solar system. Data transmission itself, as well as receiving data from satellites located on the borders of the solar system, was only possible thanks to the use of powerful deep space network (DSN) receivers, located in various places on the surface of the Earth. In...
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Speed sensorless induction motor drive with predictive current controller
PublicationToday, speed sensorless modes of operation are becoming standard solutions in the area of electric drives. This paper presents a speed sensorless control system of an induction motor with a predictive current controller. A closed-loop estimation system with robustness against motor parameter variation is used for the control approach. The proposed algorithm has been implemented using field-programmable gate arrays (FPGAs) and a...
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Verification and Benchmarking in MPA Coprocessor Design Process
PublicationThis paper presents verification and benchmarking required for the development of a coprocessor digital circuit for integer multiple-precision arithmetic (MPA). Its code is developed, with the use of very high speed integrated circuit hardware description language (VHDL), as an intellectual property core. Therefore, it can be used by a final user within their own computing system based on field-programmable gate arrays (FPGAs)....
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Open-Source Coprocessor for Integer Multiple Precision Arithmetic
PublicationThis paper presents an open-source digital circuit of the coprocessor for an integer multiple-precision arithmetic (MPA). The purpose of this coprocessor is to support a central processing unit (CPU) by offloading computations requiring integer precision higher than 32/64 bits. The coprocessor is developed using the very high speed integrated circuit hardware description language (VHDL) as an intellectual property (IP) core. Therefore,...
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FPGA implementation of the multiplication operation in multiple-precision arithmetic
PublicationAlthough standard 32/64-bit arithmetic is sufficient to solve most of the scientific-computing problems, there are still problems that require higher numerical precision. Multiple-precision arithmetic (MPA) libraries are software tools for emulation of computations in a user-defined precision. However, availability of a reconfigurable cards based on field-programmable gate arrays (FPGAs) in computing systems allows one to implement...
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IP Core of Coprocessor for Multiple-Precision-Arithmetic Computations
PublicationIn this paper, we present an IP core of coprocessor supporting computations requiring integer multiple-precision arithmetic (MPA). Whilst standard 32/64-bit arithmetic is sufficient to solve many computing problems, there are still applications that require higher numerical precision. Hence, the purpose of the developed coprocessor is to support and offload central processing unit (CPU) in such computations. The developed digital...
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The time-varying low-frequency magnetic-field emitted from the ship’s inverter-fed induction motor
Open Research DataThe dataset contains the magnetic field measurement results that are part of a comprehensive study on the assessment of the magnetic field emissions onboard of the research-training vessel. The measurements were carried out, nearby the bow thruster motor fed from the inverter, during maneuvering and the sea voyage. The bow thruster is assembled in the...
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FPGA Acceleration of Matrix-Assembly Phase of RWG-Based MoM
PublicationIn this letter, the field-programmable-gate-array accelerated implementation of matrix-assembly phase of the method of moments (MoM) is presented. The solution is based on a discretization of the frequency-domain mixed potential integral equation using the Rao-Wilton-Glisson basis functions and their extension to wire-to-surface junctions. To take advantage of the given hardware resources (i.e., Xilinx Alveo U200 accelerator card),...
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Implementation of Coprocessor for Integer Multiple Precision Arithmetic on Zynq Ultrascale+ MPSoC
PublicationRecently, we have opened the source code of coprocessor for multiple-precision arithmetic (MPA). In this contribution, the implementation and benchmarking results for this MPA coprocessor are presented on modern Zynq Ultrascale+ multiprocessor system on chip, which combines field-programmable gate array with quad-core ARM Cortex-A53 64-bit central processing unit (CPU). In our benchmark, a single coprocessor can be up to 4.5 times...
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FPGA realization of an improved alpha max plus beta min algorithm
PublicationThe generalized improved version of the alpha max plus beta min square-rooting algorithm and its realization in the Field Programmable Gate Array (FPGA) are presented. The algorithm computes the square root to calculate the approximate magnitude of a complex sample. It is especially useful for pipelined calculations in the DSP. In case of four approximation regions it is possible to reduce the peak error form 3.95% to 0.33%. This...
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A New, Reconfigurable Circuit Offering Functionality of AND and OR Logic Gates for Use in Algorithms Implemented in Hardware
PublicationThe paper presents a programmable (using a 1-bit signal) digital gate that can operate in one of two OR or AND modes. A circuit of this type can also be implemented using conventional logic gates. However, in the case of the proposed circuit, compared to conventional solutions, the advantage is a much smaller number of transistors necessary for its implementation. Circuit is also much faster than its conventional counterpart. The...
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Programmable Input Mode Instrumentation Amplifier Using Multiple Output Current Conveyors
PublicationIn this paper a programmable input mode instrumentation amplifier (IA) utilising second generation, multiple output current conveyors and transmission gates is presented. Its main advantage is the ability to choose a voltage or current mode of inputs by setting the voltage of two configuration nodes. The presented IA is prepared as an integrated circuit block to be used alone or as a sub-block in a microcontroller or in a field...
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Power equalization of AES FPGA implementation
PublicationThis paper briefly introduces side channel attacks on cryptographic hardware with special emphasis on differential power analysis(DPA). Based on existing countermeasures against DPA, design method combining power equalization for synchronous and combinatorialcircuits has been proposed. AES algorithm has been implemented in Xilinx Spartan II-E field programmable gate array (FPGA) deviceusing the standard and power-equalized methods....
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FPGA-Based System for Electromagnetic Interference Evaluation in Random Modulated DC/DC Converters
PublicationField-Programmable Gate Array (FPGA) provides the possibility to design new “electromagnetic compatibility (EMC) friendly” control techniques for power electronic converters. Such control techniques use pseudo-random modulators (RanM) to control the converter switches. However, some issues connected with the FPGA-based design of RanM, such as matching the range of fixed-point numbers, might be challenging. The modern programming...
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ASIC Design Example of Complex SoC with FPGA Prototyping
PublicationThe paper presents an example of the System on a Chip design, where the FPGA prototyping has been used. Two FPGA prototypes have been realized. The first FPGA prototype uses AVNET board containing Xilinx Virtex4 device accompanied by custom board with required devices. The second FPGA prototype has been built using the custom PCB with Xilinx Virtex-4 XC4VLX60 FPGA accompanied by all needed external components. The final system...
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FPGA Based Real Time Simulations of the Face Milling Process
PublicationThe article presents a successful implementation of the milling process simulation at the Field-Programmable Gate Array (FPGA). By using FPGA, very rigorous Real-Time (RT) simulation requirements can be met. The response time of the FPGA simulations is significantly reduced, and the time synchronization is better than in a typical RT system implemented in software. The FPGA-based approach is characterized by enormous flexibility...
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FPGA-Based Implementation of Real Time Optical Flow Algorithm and Its Applications for Digital Image Stabilization
PublicationAn efficient simplification procedure of the optical flow (OF) algorithm as well as its hardware implementation using the field programmable gate array (FPGA) technology is presented. The modified algorithm is based on block matching of subsets of successive frames, and exploits one-dimensional representation of subsets as well as the adaptive adjustments of their sizes. Also, an l1-norm-based correlation function requiring no...
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COMPARISON OF SYSTEM ON CHIP TECHNOLOGIES FOR SPACE APPLICATIONS
PublicationThe paper presents a review of technologies available for the implementation of digital and mixed signal systems, particularly the system on a chip (SoC) for space applications. The phenomena encountered in the space environment are briefly presented, together with the known solutions, regarding the design of complex electronic systems. The most important norms regarding single die integrated circuits designed for space are also...
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Acceleration of Electromagnetic Simulations on Reconfigurable FPGA Card
PublicationIn this contribution, the hardware acceleration of electromagnetic simulations on the reconfigurable field-programmable-gate-array (FPGA) card is presented. In the developed implementation of scientific computations, the matrix-assembly phase of the method of moments (MoM) is accelerated on the Xilinx Alveo U200 card. The computational method involves discretization of the frequency-domain mixed potential integral equation using...
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Sprzętowa implementacja koprocesora dla zastosowań kryptograficznych
PublicationW pracy przedstawiono procedurę implementacji elektronicznej skrzynki podawczej z wykorzystaniem zasobów sprzętowych na płytce FPGA (Filed Programmable Gate Array) typu Virtex 4. Przedstawiono ogólna zasadę działania skrzynki podawczej oraz opisano parametry i właściwości poszczególnych modułów funkcjonalnych systemu tj.: modułu TFTP Trivia File Transfer Protocol), serwera WWW, funkcji skrótu oraz asymetrycznego algorytm kryptograficznego....
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HILS for the Design of Three-Wheeled Mobile Platform Motion Surveillance System with a Use of Energy Performance Index
PublicationCurrent tendency in mechatronic design requires the use of comprehensive development of an environment, which gives the possibility to prototype, design, simulate and integrate with dedicated hardware. The paper discusses the Hardware-In-the-Loop Simulations (HILS) mechatronic technique, used during the design of the surveillance system based on energy performance index. The presented test configuration (physical controller – emulated...
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Hardware implementation of digital image stabilization using optical flow algorithm and FPGA technology
PublicationW artykule przedstawiono efektywną procedurę uproszczenia algorytmu przepływu optycznego oraz jego realizację w układzie programowalnym FPGA. Zmodyfikowany algorytm wykorzystuję metodę blokowego dopasowania podobszarów oraz jednowymiarową reprezentację podobszarów. Dodatkowo, funkcja korelacji oparta jest o normę L1. W rezultacie uzyskano zmniejszenie zużytych zasobów kosztem nieznacznej utraty dokładności. Zarówno dokładność,...
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A new concept of PWM duty cycle computation using the Barycentric Coordinates in a Three-Dimensional voltage vectors arrangement
PublicationThe paper presents a novel approach to the Pulse Width Modulation (PWM) duty cycle computing for complex or irregular voltage vector arrangements in the two (2D) and three–dimensional (3D) Cartesian coordinate systems. The given vectors arrangement can be built using at least three vectors or collections with variable number of involved vectors (i.e. virtual vectors). Graphically, these vectors form a convex figure, in particular,...
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REALIZACJA ELEMENTÓW SKŁADOWYCH ŁĄCZA RADIOWEGO Z UŻYCIEM URZĄDZEŃ RADIA PROGRAMOWALNEGO TYPU USRP
PublicationPrzez ostatnią dekadę projektowanie systemów radiowych zaczęło w coraz większym stopniu polegać na cyfrowym przetwarzaniu sygnałów. Możliwość i moc obliczeniowa procesorów ogólnego przeznaczenia GPP (General Purpose Processor), procesorów sygnałowych DSP (Digital Signal Processor) oraz układów programowalnych FPGA (Field Programmable Gate Array) znacząco wzrosła zgodnie z prawem Moor’a. Naturalnym następstwem tego trendu było większe...
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Pipelined sceling of signed residue numbers with the mixed-radix conversion in the programmable gate array
PublicationIn this work a scaling technique of signed residue numbers is proposed. The method is based on conversion to the Mixed-Radix System (MRS) adapted for the FPGA implementation. The scaling factor is assumed to be a moduli product from the Residue Number System (RNS) base. Scaling is performed by scaling of terms of the mixed-radix expansion, generation of residue reprezentation of scaled terms, binary addition of these representations...
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Pipelined division of signed numbers with the use of residue arithmetic for small number range with the programmable gate array
PublicationIn this work an architecture of the pipelined signed residue divider for the small number range is presented. Its operation is based on reciprocal calculation and multiplication by the dividend. The divisor in the signed binary form is used to compute the approximated reciprocal in the residue form by the table look-up. In order to limit the look-up table address an algorithm based on segmentation of the divisor into two segments...
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Analog filter design system for field programmable analog array.
PublicationObiektowy system do automatycznego projektowania filtrów kaskadowych i symetrycznych filtrów FLF z wykorzystaniem wzmacniaczy transkonuktancyjnych OTACi bloków bikwadratowych z optymalizacją zakresu dynamiki, zniekształceń i wrażliwości. System umożliwia realizację standardowych aproksymacji charakterystyk amplitudowych oraz dowolnie zdefiniowanych przez użytkownika.
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Hydraulic gate contact areas in view of investigation and field experience
PublicationW pracy podano ogólny przegląd dotyczący określenia powierzchni kontaktowych zamknięć wodnych. Szczególną uwagę zwrócono na siły występujące w powierzchniach kontaktowych zamknięć, trybologię i inne zjawiska mające wpływ na rozwiązania problemów kontowych określających sprawność zamknięć. Ważnym zagadnieniem jest dobór materiału i określenie jego właściwości na podstawie badań laboratoryjnych i oceny pracy tego materiału w wyniku...
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A field programmable analog array for CMOS continuous-time OTA-C filter applications
PublicationW artykule opisano programowalny wzmacniacz transkonduktancyjny oraz konfigurowalny blok analogowy CAB składający się ze wzmacniacza transkonduktancyjnego, kluczy oraz programowalnego kondensatora. Z bloków CAB można zbudować uniwersalne, programowalne filtry. Wzmacniacz transkondukancyjny został przesymulowany oraz wykonany w technologii CMOS. Wyniki pomiarów pokazują, że transkonduktancja wzmacniacza może być przestrajana ponad...
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Experimental investigation of the weight averaging of pulse frequency modulated sensor output signal
Open Research DataThe research aims to practically verify the results of theoretical analysis and simulations of the efficiency of weight averaging of pulse frequency modulated signal. For this purpose, a suitable test stand was built, and the control software in the LabVIEW environment was prepared. Then, a series of experiments were carried out to process and analyze...
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Deciphering the Molecular Mechanism of Substrate-Induced Assembly of Gold Nanocube Arrays toward an Accelerated Electrocatalytic Effect Employing Heterogeneous Diffusion Field Confinement
PublicationThe complex electrocatalytic performance of gold nanocubes (AuNCs) is the focus of this work. The faceted shapes of AuNCs and the individual assembly processes at the electrode surfaces define the heterogeneous conditions for the purpose of electrocatalytic processes. Topographic and electron imaging demonstrated slightly rounded AuNC (average of 38 nm) assemblies with sizes of ≤1 μm, where the dominating patterns are (111) and...
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IEEE Symposium on Field Programmable Custom Computing Machines
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Bogdan Pankiewicz dr hab. inż.
PeopleBogdan Pankiewicz graduated in 1993 from the Department of Electronics at Gdansk University of Technology (GUT) and in 2002 he obtained a doctoral degree in the field of electronics at the Faculty of Electronics, Telecommunications and Informatics at GUT. From the beginning of his career he is associated with GUT: first as an assistant (years 1994-2002) and then as assistant professor (since 2002) at the Faculty of Electronics,...
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Electrical characteristics simulation of top-gated graphene field-effect transistor (GFET) with 10 μm x 10 μm graphene channel
Open Research DataThe presented data set is part of the research on graphene field-effect transistor (GFET) modelling. The calculations were performed with the use of GFET Tool program (https://nanohub.org/resources/gfettool DOI: 10.4231/D3QF8JK5T), which enabled simulation of the drain current (Id) vs. drain voltage (Vd) characteristics for different gate voltages (Vg)...
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Electrical characteristics simulation of top-gated graphene field-effect transistor (GFET) with 10 μm x 3 μm graphene channel
Open Research DataThe presented data set is part of the research on graphene field-effect transistor (GFET) modelling. The calculations were performed with the use of GFET Tool program (https://nanohub.org/resources/gfettool DOI: 10.4231/D3QF8JK5T), which enabled simulation of the drain current (Id) vs. drain voltage (Vd) characteristics for different gate voltages (Vg)...
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Measurements of Subnanometer Molecular Layers
PublicationSelected methods of formation and detection of nanometer and subnanometer molecular layers were shown. Additionally, a new method of detection and measurement with subnanometer resolution of layers adsorbed or bonded to the gate dielectric of the ion selective field effect transistor (ISFET) was presented.
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The low-frequency magnetic field emissions on-board of the vessel
Open Research DataThe data represents measurement results performed on board of the vessel. The acquired time-waveforms, corresponding to the instantaneous values of the magnetic field (MF) induction were acquired near the cable supplying the bow thruster motor. Data recording of the magnetic field density (MFD) emissions was carried out with a/d converters of the data...
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Marek Wójcikowski dr hab. inż.
PeopleMarek Wójcikowski graduated in 1993 from the Department of Electronics at Gdansk University of Technology (GUT). In 2002 he obtained a doctoral degree in the field of electronics and in 2016 he obtained a habilitation at the Faculty of Electronics, Telecommunications and Informatics at GUT. From the beginning of his career he is associated with GUT: first as an assistant (years 1994-2002) and then as assistant professor (since...
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TIME- AND FREQUENCY-DOMAIN QUASI-2D SMALL-SIGNAL MOSFET MODELS
PublicationA novel approach to small-signal MOSFET modeling is presented in this book. As a result, time- and frequency-domain physics-based quasi-2D NQS four-terminal small-signal MOSFET models are proposed. The time-domain model provides the background to a novel DIBL-included quasi‑2D NQS four-terminal frequency-domain small-signal MOSFET model. Parameters and electrical quantities of the frequency-domain model are described by explicit...
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A Note on Fractional Curl Operator
PublicationIn this letter, we demonstrate that the fractional curl operator, widely used in electromagnetics since 1998, is essentially a rotation operation of components of the complex Riemann–Silberstein vector representing the electromagnetic field. It occurs that after the wave decomposition into circular polarisations, the standard duality rotation with the angle depending on the fractional order is applied to the left-handed basis vector...
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Using A Particular Sampling Method for Impedance Measurement
PublicationThe paper presents an impedance measurement method using a particular sampling method which is an alternative to DFT calculation. The method uses a sine excitation signal and sampling response signals proportional to current flowing through and voltage across the measured impedance. The object impedance is calculated without using Fourier transform. The method was first evaluated in MATLAB by means of simulation. The method was...
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UWB Microstrip Antennas on a Cylindrical Surfaces
PublicationConformal antennas are becoming popular due to their many advantages and possibilities of applications they offer. The advantages of using antennas with a curved surface arise not only from the possibility of integrating them with the object on which they are mounted on but also from the increase, relatively to planar antennas, of their visible angular range. The circular antenna arrays, or arrays of radiators located on the surface...
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Engineering Au nanoparticle arrays on SiO2 glass by pulsed UV laser irradiation
PublicationWe study semi-regular arrays of Au nanoparticles (NP) obtained via UV laser irradiation of thin Au films on glass substrate. The NP structures are prepared from films of a thickness up to 60 nm produced by discharge sputtering or pulsed laser deposition, and annealed by nanosecond laser pulses at 266 or 308 nm, respectively, at fluencies in the range of 60-410 mJ/cm2. For the rare- and close-packed NP structures, consistent description...
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Parallel Implementation of the Discrete Green's Function Formulation of the FDTD Method on a Multicore Central Processing Unit
PublicationParallel implementation of the discrete Green's function formulation of the finite-difference time-domain (DGF-FDTD) method was developed on a multicore central processing unit. DGF-FDTD avoids computations of the electromagnetic field in free-space cells and does not require domain termination by absorbing boundary conditions. Computed DGF-FDTD solutions are compatible with the FDTD grid enabling the perfect hybridization of FDTD...
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Low-frequency noise in ZrS3 van der Waals semiconductor nanoribbons
PublicationWe report the results of the investigation of low-frequency electronic noise in ZrS3 van der Waals semiconductor nanoribbons. The test structures were of the back-gated field-effect-transistor type with a normally off n-channel and an on-to-off ratio of up to four orders of magnitude. The current–voltage transfer characteristics revealed significant hysteresis owing to the presence of deep levels. The noise in ZrS3 nanoribbons...
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Electronic Noses in Medical Diagnostics
PublicationElectronic nose technology is being developed in order to identify aromas in a way parallel to the biologic olfaction. When applied to the field of medicine, such device should be able to identify and discriminate between different diseases. In recent years this kind of approach finds application in medical diagnostics, and especially in disease screening. Despite the fact that devices utilizing chemical sensor arrays are not routinely...
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BEZCZUJNIKOWE STEROWANIE WOLNOOBROTOWYM SILNIKIEM PMSM Z KOMPENSACJĄ MOMENTU ZACZEPOWEGO
PublicationW pracy przedstawiono propozycję rozwiązania problemu bezczujnikowego sterowania wolnoobrotową maszyną synchroniczną z magnesami trwałymi PMSM. Przedstawiono silnik PMSM, który zastosowano w stanowisku badawczym. Omówiono problem występowania tętnień momentu napędowego wynikający głównie ze znacznego momentu zaczepowego. Pokazano rozwiązanie kompensujące tętnienia momentu napędowego w silniku PMSM. Przygotowano procedurę startową...
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Organic Vapor Sensing Mechanisms by Large-Area Graphene Back-Gated Field-Effect Transistors under UV Irradiation
PublicationThe gas sensing properties of graphene back-gated field-effect transistor (GFET) sensors toward acetonitrile, tetrahydrofuran, and chloroform vapors were investigated with the focus on unfolding possible gas detection mechanisms. The FET configuration of the sensor device enabled gate voltage tuning for enhanced measurements of changes in DC electrical characteristics. Electrical measurements were combined with a fluctuation-enhanced...
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Study of ZrS3-based field-effect transistors toward the understanding of the mechanisms of light-enhanced gas sensing by transition metal trichalcogenides
PublicationExtending knowledge of the properties of low-dimensional van der Waals materials, including their reactivity to the ambiance, is important for developing innovative electronic and optoelectronic devices. Transition metal trichalcogenides with tunable optical band gaps and anisotropic conductivity are an emerging class among low- dimensional structures with the possibility of gate tunability and photoreactivity. These properties...
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A quasi-2D small-signal MOSFET model - main results
PublicationDynamic properties of the MOS transistor under small-signal excitation are determined by kinetic parameters of the carriers injected into the channel, i.e., the low-field mobility, velocity saturation, mobility at the quiescent-point (Q-point), longitudinal electric field in the channel, by dynamic properties of the channel, as well as by an electrical coupling between the perturbed carrier concentration in the channel and the...